带 0.5 波长自匹配连接器的晶圆级 3D 集成 T/R 微系统

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-09-23 DOI:10.1016/j.mejo.2024.106421

Shengchang Zhang , Guangbao Shan , Yi Luo , Hui Deng

{"title":"带 0.5 波长自匹配连接器的晶圆级 3D 集成 T/R 微系统","authors":"Shengchang Zhang , Guangbao Shan , Yi Luo , Hui Deng","doi":"10.1016/j.mejo.2024.106421","DOIUrl":null,"url":null,"abstract":"<div><div>Achieving high performance, multifunctionality, and a compact size simultaneously in a single T/R module presents a significant challenge. In this work, both the 'chiplet' technique and 3D integration technique are adopted to form a T/R microsystem using self-matching interconnectors. Such T/R microsystem consists of four GaAs chips and one CMOS chip. The designed microsystem with a small size is utilized for the application of tile-type mmWave active phased array. Its measured results demonstrate good performance in terms of high gain, large output power, 6-bit phase shift, and 6-bit attenuation, confirming the effectiveness of our adopted architecture and design method. As such, this work provides a valuable design guideline for the chiplet-based 3D integrated RF microsystem.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A wafer-level 3D integrated T/R microsystem with 0.5-wavelength self-matching connectors\",\"authors\":\"Shengchang Zhang , Guangbao Shan , Yi Luo , Hui Deng\",\"doi\":\"10.1016/j.mejo.2024.106421\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Achieving high performance, multifunctionality, and a compact size simultaneously in a single T/R module presents a significant challenge. In this work, both the 'chiplet' technique and 3D integration technique are adopted to form a T/R microsystem using self-matching interconnectors. Such T/R microsystem consists of four GaAs chips and one CMOS chip. The designed microsystem with a small size is utilized for the application of tile-type mmWave active phased array. Its measured results demonstrate good performance in terms of high gain, large output power, 6-bit phase shift, and 6-bit attenuation, confirming the effectiveness of our adopted architecture and design method. As such, this work provides a valuable design guideline for the chiplet-based 3D integrated RF microsystem.</div></div>\",\"PeriodicalId\":49818,\"journal\":{\"name\":\"Microelectronics Journal\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2024-09-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1879239124001255\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124001255","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

摘要

在单个 T/R 模块中同时实现高性能、多功能和小尺寸是一项重大挑战。在这项工作中，采用了 "chiplet "技术和三维集成技术，利用自匹配互联器形成了一个 T/R 微型系统。这种 T/R 微系统由四个砷化镓芯片和一个 CMOS 芯片组成。所设计的微系统体积小，可用于瓦片型毫米波有源相控阵。测量结果表明，该系统在高增益、大输出功率、6 位相移和 6 位衰减方面性能良好，证实了我们所采用的架构和设计方法的有效性。因此，这项工作为基于芯片的三维集成射频微系统提供了宝贵的设计指南。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A wafer-level 3D integrated T/R microsystem with 0.5-wavelength self-matching connectors

Achieving high performance, multifunctionality, and a compact size simultaneously in a single T/R module presents a significant challenge. In this work, both the 'chiplet' technique and 3D integration technique are adopted to form a T/R microsystem using self-matching interconnectors. Such T/R microsystem consists of four GaAs chips and one CMOS chip. The designed microsystem with a small size is utilized for the application of tile-type mmWave active phased array. Its measured results demonstrate good performance in terms of high gain, large output power, 6-bit phase shift, and 6-bit attenuation, confirming the effectiveness of our adopted architecture and design method. As such, this work provides a valuable design guideline for the chiplet-based 3D integrated RF microsystem.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.