PDQRRFF:用于 BIST 的泊松分布式量子随机可逆触发器发生器

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Kannan R , Vidhya K
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引用次数: 0

摘要

可逆逻辑最近大受欢迎,因为它使电路的功耗大大降低。由于量子操作固有的可逆性,人们对设计和优化可逆电路产生了极大的兴趣。在这项工作中,我们提出了一种新的门,名为跨维德坎门(transvidkan gate)、量子随机可逆触发器(Quantum Random Reversible Flip Flop)、序列发生器(Sequence generator)和内置自检(BIST)。量子随机可逆触发器(QRRFF)是一种新兴技术,被用于各种使用现代安全和加密系统的应用程序中。为创建随机字符串,典型的方法是将熵源与消除或比特生成系统相结合。量子计算可逆逻辑芯片和低功耗设计正成为引人入胜的研究课题。基于经典逻辑的 8 位可逆比较器使用现有的可逆门来表示。本研究为比较器设计提供了一种基于 BIST 的架构,可减少垃圾输出、量子成本和常数输入。根据仿真结果,所提出的方法在硬件复杂性和量子成本方面优于传统方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
PDQRRFF: Poisson-distributed quantum random reversible flip flop generator for BIST
Reversible logic has gained popularity recently because it allows circuits to use significantly less power. Due to the inherent reversibility of quantum operation, there is enormous interest in designing and optimizing reversible circuits. In this work, a new gate named as transvidkan gate, Quantum Random Reversible Flip Flop, Sequence generator, and Build in Self-Test (BIST) has been proposed. Quantum Random Reversible Flip Flop (QRRFF) is an emerging technology that is used in a variety of apps that use modern security and encryption systems. For creating a random string, typical approaches combine an entropy source with an elimination or bit-generation system. Quantum computing reversible logic chips and Low-power design are emerging as intriguing research topics. A classical logic-based 8-bit reversible comparator is represented using existing reversible gates. This study provides a BIST-based architecture for a comparator design that reduces the garbage outputs, quantum cost, and constant inputs. According to simulation result, the proposed approach outperforms traditional methods in terms of hardware complexity and quantum cost.
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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