用于高性能低压电流镜的创新反馈方法

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Astha Dadheech, Nikhil Raj, Divyang Rawal
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引用次数: 0

摘要

本文介绍了一种提高基于低电压翻转电压跟随器(FVF)的电流镜输入和输出电阻性能的方法。所提出的技术包括用一个反馈布置的晶体管网络取代主输出晶体管,以提高输出电阻。此外,还采用了低饱和起始晶体管方法来提高性能。这种方法还有助于降低电流镜的输入电阻(以欧姆为单位)。在电流传输误差最小为 0.38 % 的情况下,实现了高达 1 mA 的宽电流范围。这种基于反馈机制的电流镜的输出电阻为 29.61 GΩ,输入电阻为 30.45 Ω,带宽为 1.464 GHz。拟议的电流镜在±0.5 V 电源电压下运行。通过工艺转角分析、温度失配评估和蒙特卡罗模拟,对所提电路的稳健性进行了评估。利用 Cadence Virtuoso 和 Spectre 仿真在 0.18 μm UMC 技术上验证和模拟了拟议电流镜的性能特征。验证过程包括布局前和布局后仿真结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Innovative feedback approach for high-performance low-voltage current mirror

The paper presents an approach to increase the performance in terms of input and output resistance of a low voltage flipped voltage follower (FVF) based current mirror. The proposed technique consists of substituting the main output transistor with a network of transistors in a feedback arrangement, designed to improve the output resistance. Furthermore, a low saturation onset transistor approach is used to improve the performance. Such an approach also helped in reducing the input resistance of the current mirror, which ranges in ohms. A wide current range of up to 1 mA is achieved at a minimal current transfer error of 0.38 %. This feedback mechanism-based current mirror exhibits an output resistance of 29.61 GΩ, an input resistance of 30.45 Ω, and a bandwidth of 1.464 GHz. The proposed current mirror runs on ±0.5 V supply voltage. The robustness of the proposed circuit is evaluated through process corner analysis, temperature mismatch assessment, and Monte-Carlo simulations. The performance characteristics of the proposed current mirror have been validated and simulated using Cadence Virtuoso and Spectre simulations on 0.18 μm UMC technology. The validation process included both pre-layout and post-layout simulation results.

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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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