采用 22 纳米 FDSOI CMOS 的 55-100-GHz 增强型吉尔伯特单元混频器设计

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Kimi Jokiniemi;Kaisa Ryynänen;Joni Vähä;Elmo Kankkunen;Kari Stadius;Jussi Ryynänen
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引用次数: 0

摘要

本文提出了一种宽带有源毫米波(mmWave) CMOS下变频混频器,并进行了深入的分析。本文旨在为混频器拓扑的合理选择提供坚实的推理,并提出实现高混频器性能的方法,指导毫米波混频器的设计。本文首先分析了弱正弦本振(LO)信号下无源混频器和有源混频器的输入阻抗和开关性能,表明无源混频器的开关性能更依赖于LO信号。然后介绍了不同的有源混频器设计增强技术,即峰值电感和单个混频器级偏置。本文提出了一种增强的吉尔伯特单元混频器,它在跨导和开关级之间使用变压器耦合。采用22nm FDSOI工艺制造的具有LO缓冲器和IF放大器的完整混频器结构仅消耗0.13 mm2的面积。该设计实现了3.5 dB的峰值电压转换增益(CG), 55 - 100 ghz的异常宽RF带宽和10 ghz的中频带宽。完整的混频器从低0.8 v电源电压消耗33 mW的功率,并显示输入1-dB增益压缩点为- 6 dBm。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
55–100-GHz Enhanced Gilbert Cell Mixer Design in 22-nm FDSOI CMOS
This article presents a wideband active millimeter wave (mmWave) CMOS downconversion mixer preceded by thorough analysis. This article aims to provide solid reasoning for the proper choice of mixer topology and present methods to achieve high mixer performance, guiding mmWave mixer design. The article first analyses passive and active mixer input impedance and switching performance with a weak sinusoidal local oscillator (LO) signal, demonstrating that passive mixer switching performance is far more dependent on the LO signal. The article then introduces different active mixer design enhancement techniques, namely, peaking inductances and individual mixer stage biasing. The article proposes an enhanced Gilbert cell mixer that uses transformer coupling between the transconductance and switching stages. The complete mixer structure with an LO buffer and an IF amplifier consumes an area of only 0.13 mm2 fabricated in a 22-nm FDSOI process. The design achieves a measured peak voltage conversion gain (CG) of 3.5 dB, an exceptionally wide 55–100-GHz RF bandwidth, and a 10-GHz IF bandwidth. The complete mixer consumes 33 mW of power from a low 0.8-V supply voltage and demonstrates an input 1-dB gain compression point of −6 dBm.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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