{"title":"静电掺杂异质结构垂直硅（1-x）Gex/硅纳米管 TFET 的设计与研究","authors":"","doi":"10.1016/j.mejo.2024.106417","DOIUrl":null,"url":null,"abstract":"<div><p>Researchers are inclining toward heterostructures suitable lattice matching, in Tunnel FETs to eliminate the difficulties of decreased On-Current, subthreshold swings, and ambipolar behavior. Nowadays, Electrostatic doping (ED) is a scrutinized substitute device for creating areas with a high electron or hole density to the conventional doped devices. This manuscript proposes an Electrostatic Doped Heterostructure Vertical Si<sub>(1-x)</sub>Ge<sub>x</sub>/Si Nanotube Tunnel Field Effect with performance scanned by analyzing the different device parameters, considering the energy band diagram, concentrations of electrons, holes, potential, and electric field. In comparison to the Nanowire TFETs, the area, and rate of tunneling of the proposed device stand superior with a better I<sub>ON</sub>/I<sub>OFF</sub> ratio of 1.56∗10<sup>13</sup> and a lower OFF-current of about ∼10<sup>−18</sup>A/μm. The device exhibits a Drain current (I<sub>DS</sub>) of 2.39∗10<sup>5</sup>A/μm. The architecture of the suggested device possessing Si(1-x)Gex/Si structure exhibits enhanced characteristics like improved steepness of the sub-threshold slope, I<sub>ON</sub>/I<sub>OFF</sub> ratio, drain current, and lowered OFF-current.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and investigation of electrostatic doped heterostructure vertical Si(1-x)Gex/Si nanotube TFET\",\"authors\":\"\",\"doi\":\"10.1016/j.mejo.2024.106417\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Researchers are inclining toward heterostructures suitable lattice matching, in Tunnel FETs to eliminate the difficulties of decreased On-Current, subthreshold swings, and ambipolar behavior. Nowadays, Electrostatic doping (ED) is a scrutinized substitute device for creating areas with a high electron or hole density to the conventional doped devices. This manuscript proposes an Electrostatic Doped Heterostructure Vertical Si<sub>(1-x)</sub>Ge<sub>x</sub>/Si Nanotube Tunnel Field Effect with performance scanned by analyzing the different device parameters, considering the energy band diagram, concentrations of electrons, holes, potential, and electric field. In comparison to the Nanowire TFETs, the area, and rate of tunneling of the proposed device stand superior with a better I<sub>ON</sub>/I<sub>OFF</sub> ratio of 1.56∗10<sup>13</sup> and a lower OFF-current of about ∼10<sup>−18</sup>A/μm. The device exhibits a Drain current (I<sub>DS</sub>) of 2.39∗10<sup>5</sup>A/μm. The architecture of the suggested device possessing Si(1-x)Gex/Si structure exhibits enhanced characteristics like improved steepness of the sub-threshold slope, I<sub>ON</sub>/I<sub>OFF</sub> ratio, drain current, and lowered OFF-current.</p></div>\",\"PeriodicalId\":49818,\"journal\":{\"name\":\"Microelectronics Journal\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2024-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1879239124001218\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124001218","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Design and investigation of electrostatic doped heterostructure vertical Si(1-x)Gex/Si nanotube TFET
Researchers are inclining toward heterostructures suitable lattice matching, in Tunnel FETs to eliminate the difficulties of decreased On-Current, subthreshold swings, and ambipolar behavior. Nowadays, Electrostatic doping (ED) is a scrutinized substitute device for creating areas with a high electron or hole density to the conventional doped devices. This manuscript proposes an Electrostatic Doped Heterostructure Vertical Si(1-x)Gex/Si Nanotube Tunnel Field Effect with performance scanned by analyzing the different device parameters, considering the energy band diagram, concentrations of electrons, holes, potential, and electric field. In comparison to the Nanowire TFETs, the area, and rate of tunneling of the proposed device stand superior with a better ION/IOFF ratio of 1.56∗1013 and a lower OFF-current of about ∼10−18A/μm. The device exhibits a Drain current (IDS) of 2.39∗105A/μm. The architecture of the suggested device possessing Si(1-x)Gex/Si structure exhibits enhanced characteristics like improved steepness of the sub-threshold slope, ION/IOFF ratio, drain current, and lowered OFF-current.
期刊介绍：
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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