氧化镍掺杂和沟道壁倾斜对 Ga2O3 PiN 二极管性能的影响

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-09-02 DOI:10.1016/j.mejo.2024.106399

Geon-Hee Lee , Tae-Hee Lee , Ji-Soo Choi , Young-Hun Cho , Ye-Jin Kim , Hoon-Kyu Shin , Sang-Mo Koo

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引用次数: 0

摘要

氧化镓（Ga2O3）具有宽带隙（∼4.9 eV）、高巴利加功勋值（FOM）（3444 W/cmK）和高击穿场（Ec，8 MV/cm），是一种很有前途的下一代功率半导体材料。为了实现高阻塞和低漏电流，人们对 PN 异质结和斜面结构进行了研究。在本文中，我们使用 Sentaurus TCAD 进行了模拟，研究了 NiO 掺杂浓度和 NiO 沟道倾斜角度对带有 NiO 沟道的 NiO/Ga2O3 PiN 二极管电气特性的影响。随着氧化镍掺杂浓度的增加，电阻从 21.5 mΩcm2 下降到 7.5 mΩcm2，我们观察到耗竭从氧化镍扩大到氧化镍/Ga2O3 界面。此外，我们还证实，随着氧化镍沟槽倾斜度的增加，电阻会降低，击穿电压也会发生变化。通过了解减轻边缘区域高电场集中的最佳角度，我们预计可以制造出稳定的 Ga2O3 PiN 二极管。

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Effects of NiO doping and trench wall tilt on Ga2O3 PiN diodes performance

Gallium Oxide (Ga₂O₃) is a promising material for next-generation power semiconductors due to its wide bandgap (∼4.9 eV), high Baliga's figure of merit (FOM) (3444 W/cmK), and high breakdown field (E_c, 8 MV/cm). To achieve high blocking and low leakage current, research has been conducted on PN heterojunctions and bevel structures. In this paper, we performed simulations using Sentaurus TCAD to investigate the impact of NiO doping concentration and NiO's trench tilt angle on the electrical characteristics of NiO/Ga₂O₃ PiN diodes with trench NiO. As the NiO doping concentration increased, the resistance decreased from 21.5 to 7.5 mΩcm², and we observed the expansion of depletion from NiO to the NiO/Ga₂O₃ interface. Furthermore, we confirmed a reduction in resistance and a change in breakdown voltage with an increase in NiO trench tilt. By understanding the optimal angle to mitigate the concentration of high electric fields in the edge region, we anticipate the fabrication of stable Ga₂O₃ PiN diodes.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.