Pablo Jiménez-Fernández , Alberto Rodríguez-Pérez , Enrique Prefasi , Francisco Sierra , Rocío del Río , Óscar Guerra
{"title":"使用全定制 nMOS 型变容器的基于 LC 罐的 DCO,适用于低功耗高速应用","authors":"Pablo Jiménez-Fernández , Alberto Rodríguez-Pérez , Enrique Prefasi , Francisco Sierra , Rocío del Río , Óscar Guerra","doi":"10.1016/j.mejo.2024.106398","DOIUrl":null,"url":null,"abstract":"<div><p><span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-tank based Digital Controlled Oscillators (<span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCOs) are widely used in digital assisted high-speed data communication systems due to their high quality factor (<span><math><mi>Q</mi></math></span>). Typically, <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCOs incorporate digital-controlled varactors for frequency control. The varactor structure significantly influences oscillator <span><math><mi>Q</mi></math></span> and phase noise performance. In this paper we propose using full-custom varactors built with digitally connected nMOS-type transistors to enhance the varactor <span><math><mi>Q</mi></math></span> by reducing its length. However, parasitic resistance from varactor array interconnection with the <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-tank can impact the overall oscillator performance. This paper presents a methodology to systematically include the proposed varactor array and its parasitic effects into <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCO design flow. Following the proposed method, an optimal combination of the inductor and varactor array can be accurately determined. As a proof of concept, we designed and manufactured a 23.5-GHz <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCO using 28-nm CMOS RF process. The oscillator exhibits a maximum phase noise of −90.1 dBc/Hz at 1-MHz offset with a power consumption of only 1.71 mW at 1-V supply.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An LC-tank based DCO for low-power high-speed applications using full-custom nMOS-type varactors\",\"authors\":\"Pablo Jiménez-Fernández , Alberto Rodríguez-Pérez , Enrique Prefasi , Francisco Sierra , Rocío del Río , Óscar Guerra\",\"doi\":\"10.1016/j.mejo.2024.106398\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p><span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-tank based Digital Controlled Oscillators (<span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCOs) are widely used in digital assisted high-speed data communication systems due to their high quality factor (<span><math><mi>Q</mi></math></span>). Typically, <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCOs incorporate digital-controlled varactors for frequency control. The varactor structure significantly influences oscillator <span><math><mi>Q</mi></math></span> and phase noise performance. In this paper we propose using full-custom varactors built with digitally connected nMOS-type transistors to enhance the varactor <span><math><mi>Q</mi></math></span> by reducing its length. However, parasitic resistance from varactor array interconnection with the <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-tank can impact the overall oscillator performance. This paper presents a methodology to systematically include the proposed varactor array and its parasitic effects into <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCO design flow. Following the proposed method, an optimal combination of the inductor and varactor array can be accurately determined. As a proof of concept, we designed and manufactured a 23.5-GHz <span><math><mrow><mi>L</mi><mi>C</mi></mrow></math></span>-DCO using 28-nm CMOS RF process. The oscillator exhibits a maximum phase noise of −90.1 dBc/Hz at 1-MHz offset with a power consumption of only 1.71 mW at 1-V supply.</p></div>\",\"PeriodicalId\":49818,\"journal\":{\"name\":\"Microelectronics Journal\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2024-09-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1879239124001024\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124001024","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
An LC-tank based DCO for low-power high-speed applications using full-custom nMOS-type varactors
-tank based Digital Controlled Oscillators (-DCOs) are widely used in digital assisted high-speed data communication systems due to their high quality factor (). Typically, -DCOs incorporate digital-controlled varactors for frequency control. The varactor structure significantly influences oscillator and phase noise performance. In this paper we propose using full-custom varactors built with digitally connected nMOS-type transistors to enhance the varactor by reducing its length. However, parasitic resistance from varactor array interconnection with the -tank can impact the overall oscillator performance. This paper presents a methodology to systematically include the proposed varactor array and its parasitic effects into -DCO design flow. Following the proposed method, an optimal combination of the inductor and varactor array can be accurately determined. As a proof of concept, we designed and manufactured a 23.5-GHz -DCO using 28-nm CMOS RF process. The oscillator exhibits a maximum phase noise of −90.1 dBc/Hz at 1-MHz offset with a power consumption of only 1.71 mW at 1-V supply.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.