{"title":"利用范德华接触实现高电流密度和低接触电阻的单极 p 型单层 WSe2 场效应晶体管","authors":"Miaomiao Li, Xinyu Zhang, Zimei Zhang, Gang Peng, Zhihong Zhu, Jia Li, Shiqiao Qin, Mengjian Zhu","doi":"10.1007/s12274-024-6942-5","DOIUrl":null,"url":null,"abstract":"<p>High-performance field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors have demonstrated great promise in post-Moore integrated circuits. However, unipolar p-type 2D semiconductor transistors yet remain challenging and suffer from low saturation current density (less than 10 µA·µm<sup>−1</sup>) and high contact resistance (larger than 100 kΩ·µm), mainly limited by the Schottky barrier induced by the mismatch of the work-functions and the Fermi level pinning at the metal contact interfaces. Here, we overcome these two obstacles through van der Waals (vdW) integration of high work-function metal palladium (Pd) as the contacts onto monolayer WSe<sub>2</sub> grown by chemical vapor deposition (CVD) method. We demonstrate unipolar p-type monolayer WSe<sub>2</sub> FETs with superior device performance: room temperature on-state current density exceeding 100 µA·µm<sup>−1</sup>, contact resistance of 12 kΩ·µm, on/off ratio over 10<sup>7</sup>, and field-effect hole mobility of ~ 103 cm<sup>2</sup>·V<sup>−1</sup>·s<sup>−1</sup>. Electrical transport measurements reveal that the Fermi level pinning effect is completely effectively eliminated in monolayer WSe<sub>2</sub> with vdW Pd contacts, leading to a Schottky barrier-free Ohmic contact at the metal-semiconductor junctions. Combining the advantages of large-scale vdW contact strategy and CVD growth, our results pave the way for wafer-scale fabrication of complementary-metal-oxide-semiconductor (CMOS) logic circuits based on atomically thin 2D semiconductors.\n</p>","PeriodicalId":713,"journal":{"name":"Nano Research","volume":"15 1","pages":""},"PeriodicalIF":9.5000,"publicationDate":"2024-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Unipolar p-type monolayer WSe2 field-effect transistors with high current density and low contact resistance enabled by van der Waals contacts\",\"authors\":\"Miaomiao Li, Xinyu Zhang, Zimei Zhang, Gang Peng, Zhihong Zhu, Jia Li, Shiqiao Qin, Mengjian Zhu\",\"doi\":\"10.1007/s12274-024-6942-5\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>High-performance field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors have demonstrated great promise in post-Moore integrated circuits. However, unipolar p-type 2D semiconductor transistors yet remain challenging and suffer from low saturation current density (less than 10 µA·µm<sup>−1</sup>) and high contact resistance (larger than 100 kΩ·µm), mainly limited by the Schottky barrier induced by the mismatch of the work-functions and the Fermi level pinning at the metal contact interfaces. Here, we overcome these two obstacles through van der Waals (vdW) integration of high work-function metal palladium (Pd) as the contacts onto monolayer WSe<sub>2</sub> grown by chemical vapor deposition (CVD) method. We demonstrate unipolar p-type monolayer WSe<sub>2</sub> FETs with superior device performance: room temperature on-state current density exceeding 100 µA·µm<sup>−1</sup>, contact resistance of 12 kΩ·µm, on/off ratio over 10<sup>7</sup>, and field-effect hole mobility of ~ 103 cm<sup>2</sup>·V<sup>−1</sup>·s<sup>−1</sup>. Electrical transport measurements reveal that the Fermi level pinning effect is completely effectively eliminated in monolayer WSe<sub>2</sub> with vdW Pd contacts, leading to a Schottky barrier-free Ohmic contact at the metal-semiconductor junctions. Combining the advantages of large-scale vdW contact strategy and CVD growth, our results pave the way for wafer-scale fabrication of complementary-metal-oxide-semiconductor (CMOS) logic circuits based on atomically thin 2D semiconductors.\\n</p>\",\"PeriodicalId\":713,\"journal\":{\"name\":\"Nano Research\",\"volume\":\"15 1\",\"pages\":\"\"},\"PeriodicalIF\":9.5000,\"publicationDate\":\"2024-08-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Nano Research\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://doi.org/10.1007/s12274-024-6942-5\",\"RegionNum\":2,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"CHEMISTRY, PHYSICAL\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Nano Research","FirstCategoryId":"88","ListUrlMain":"https://doi.org/10.1007/s12274-024-6942-5","RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"CHEMISTRY, PHYSICAL","Score":null,"Total":0}
Unipolar p-type monolayer WSe2 field-effect transistors with high current density and low contact resistance enabled by van der Waals contacts
High-performance field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors have demonstrated great promise in post-Moore integrated circuits. However, unipolar p-type 2D semiconductor transistors yet remain challenging and suffer from low saturation current density (less than 10 µA·µm−1) and high contact resistance (larger than 100 kΩ·µm), mainly limited by the Schottky barrier induced by the mismatch of the work-functions and the Fermi level pinning at the metal contact interfaces. Here, we overcome these two obstacles through van der Waals (vdW) integration of high work-function metal palladium (Pd) as the contacts onto monolayer WSe2 grown by chemical vapor deposition (CVD) method. We demonstrate unipolar p-type monolayer WSe2 FETs with superior device performance: room temperature on-state current density exceeding 100 µA·µm−1, contact resistance of 12 kΩ·µm, on/off ratio over 107, and field-effect hole mobility of ~ 103 cm2·V−1·s−1. Electrical transport measurements reveal that the Fermi level pinning effect is completely effectively eliminated in monolayer WSe2 with vdW Pd contacts, leading to a Schottky barrier-free Ohmic contact at the metal-semiconductor junctions. Combining the advantages of large-scale vdW contact strategy and CVD growth, our results pave the way for wafer-scale fabrication of complementary-metal-oxide-semiconductor (CMOS) logic circuits based on atomically thin 2D semiconductors.
期刊介绍:
Nano Research is a peer-reviewed, international and interdisciplinary research journal that focuses on all aspects of nanoscience and nanotechnology. It solicits submissions in various topical areas, from basic aspects of nanoscale materials to practical applications. The journal publishes articles on synthesis, characterization, and manipulation of nanomaterials; nanoscale physics, electrical transport, and quantum physics; scanning probe microscopy and spectroscopy; nanofluidics; nanosensors; nanoelectronics and molecular electronics; nano-optics, nano-optoelectronics, and nano-photonics; nanomagnetics; nanobiotechnology and nanomedicine; and nanoscale modeling and simulations. Nano Research offers readers a combination of authoritative and comprehensive Reviews, original cutting-edge research in Communication and Full Paper formats. The journal also prioritizes rapid review to ensure prompt publication.