{"title":"共轭电流镜:跨导放大器的全面提升","authors":"Meysam Akbari;Kea-Tiong Tang","doi":"10.1109/TVLSI.2024.3439525","DOIUrl":null,"url":null,"abstract":"This work presents a general enhancement in operational transconductance amplifiers (OTAs) by conjugating the diode-connected topologies of the current mirrors (CMs). The proposed conjugation method provides an internal high-impedance node, by which the transconductance of the amplifier is significantly increased. Since the central node of the conjugated CMs is virtually grounded for small differential signals, the cascode devices of the diode-connected topologies can be employed as an extra differential pair causing a further enhancement in transconductance. Moreover, the large signal behavior of the circuit shows that the conjugated CMs are capable of copying a dynamic current with a higher gain in comparison with a traditional CM amplifier. This advantage results in faster charging and discharging of the output capacitive load, which provides a larger slew rate (SR) without increasing the quiescent current. The proposed amplifier was manufactured with TSMC 0.18-\n<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>\nm CMOS technology occupying a silicon area of \n<inline-formula> <tex-math>$55.5\\times 48.9~\\mu $ </tex-math></inline-formula>\nm. Experimental results at a supply voltage of 1.8 V show a gain bandwidth (GBW) of 104.9 MHz, a dc gain of 79.1 dB, and an SR of 55.7 V/\n<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>\ns for a capacitive load of 10 pF, while the circuit consumes 489-\n<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>\nW power.","PeriodicalId":13425,"journal":{"name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","volume":"32 10","pages":"1801-1811"},"PeriodicalIF":2.8000,"publicationDate":"2024-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The Conjugated Current Mirrors: A General Enhancement in Transconductance Amplifiers\",\"authors\":\"Meysam Akbari;Kea-Tiong Tang\",\"doi\":\"10.1109/TVLSI.2024.3439525\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a general enhancement in operational transconductance amplifiers (OTAs) by conjugating the diode-connected topologies of the current mirrors (CMs). The proposed conjugation method provides an internal high-impedance node, by which the transconductance of the amplifier is significantly increased. Since the central node of the conjugated CMs is virtually grounded for small differential signals, the cascode devices of the diode-connected topologies can be employed as an extra differential pair causing a further enhancement in transconductance. Moreover, the large signal behavior of the circuit shows that the conjugated CMs are capable of copying a dynamic current with a higher gain in comparison with a traditional CM amplifier. This advantage results in faster charging and discharging of the output capacitive load, which provides a larger slew rate (SR) without increasing the quiescent current. The proposed amplifier was manufactured with TSMC 0.18-\\n<inline-formula> <tex-math>$\\\\mu $ </tex-math></inline-formula>\\nm CMOS technology occupying a silicon area of \\n<inline-formula> <tex-math>$55.5\\\\times 48.9~\\\\mu $ </tex-math></inline-formula>\\nm. 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引用次数: 0
摘要
这项研究通过共轭电流镜(CM)的二极管连接拓扑结构,提出了一种普遍增强运算跨导放大器(OTA)的方法。所提出的共轭方法提供了一个内部高阻抗节点,从而显著提高了放大器的跨导。由于共轭 CM 的中心节点对于小差分信号几乎是接地的,因此二极管连接拓扑的级联器件可用作额外的差分对,从而进一步提高跨导。此外,电路的大信号行为表明,与传统的 CM 放大器相比,共轭 CM 能够以更高的增益复制动态电流。这一优势可加快输出电容负载的充放电速度,从而在不增加静态电流的情况下提供更大的压摆率(SR)。实验结果表明,在电源电压为 1.8 V 时,增益带宽 (GBW) 为 104.9 MHz,直流增益为 79.1 dB,电容负载为 10 pF 时的 SR 为 55.7 V/ $\mu $s,而电路功耗为 489- $\mu $W。
The Conjugated Current Mirrors: A General Enhancement in Transconductance Amplifiers
This work presents a general enhancement in operational transconductance amplifiers (OTAs) by conjugating the diode-connected topologies of the current mirrors (CMs). The proposed conjugation method provides an internal high-impedance node, by which the transconductance of the amplifier is significantly increased. Since the central node of the conjugated CMs is virtually grounded for small differential signals, the cascode devices of the diode-connected topologies can be employed as an extra differential pair causing a further enhancement in transconductance. Moreover, the large signal behavior of the circuit shows that the conjugated CMs are capable of copying a dynamic current with a higher gain in comparison with a traditional CM amplifier. This advantage results in faster charging and discharging of the output capacitive load, which provides a larger slew rate (SR) without increasing the quiescent current. The proposed amplifier was manufactured with TSMC 0.18-
$\mu $
m CMOS technology occupying a silicon area of
$55.5\times 48.9~\mu $
m. Experimental results at a supply voltage of 1.8 V show a gain bandwidth (GBW) of 104.9 MHz, a dc gain of 79.1 dB, and an SR of 55.7 V/
$\mu $
s for a capacitive load of 10 pF, while the circuit consumes 489-
$\mu $
W power.
期刊介绍:
The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society.
Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels.
To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.