用于增强模拟集成电路设计自动化的新型 TriNet 架构

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Arunkumar P Chavan;Shrish Shrinath Vaidya;Sanket M. Mantrashetti;Abhishek Gurunath Dastikopp;Kishan S. Murthy;H. V. Ravish Aradhya;Prakash Pawar
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引用次数: 0

摘要

由于耗时的数学计算和电路设计的复杂性,模拟集成电路 (IC) 设计及其自动化面临巨大挑战。尽管人们一直在努力实现模拟设计流程的自动化,但目前的方法无法满足精确的设计要求,而且存在误差,这就凸显出需要一种能够准确预测电路的更强大的方法。此外,还需要改进数据集收集技术,以提高自动化流程的整体性能。电源管理单元(PMU)是任何集成电路中的关键模块,需要设计低压差稳压器(LDO),而放大器是其基本模块。本研究利用深度神经网络(DNN)的功能来自动化重要的放大器模块,如差分放大器(DiffAmp)和两级运算放大器(OpAmp)。此外,它还为 LDO 的高层电路提出了一个自动化框架。本文介绍了针对放大器各种参数(包括增益、带宽和功率)设计的新型 "TriNet "架构,有助于对 DiffAmp 和 OpAmp 进行精确预测,并提出了专为 LDO 量身定制的解码器架构。一个值得注意的方面是开发了一种高效技术,可在较短的时间内获取较大的数据集。所介绍的方法具有很高的准确率,DiffAmp 和 OpAmp 电路的准确率达到 97.3%,LDO 设计的准确率达到 94.3%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Novel TriNet Architecture for Enhanced Analog IC Design Automation
Analog integrated circuit (IC) design and its automation pose significant challenges due to the time-consuming mathematical computations and complexity of circuit design. Though efforts have been made to automate the analog design flow, the current approach falls short in meeting the exact design requirements and plagued by inaccuracies, highlighting the necessity for a more robust approach capable of accurately predicting circuits. In addition, there is a need for an improved dataset collection technique to enhance the overall performance of the automation process. The power management unit (PMU) is a crucial block in any IC that requires the design of low-dropout regulator (LDO) for which amplifiers are fundamental blocks. This research harnesses the capabilities of deep neural networks (DNNs) to automate essential amplifier blocks, such as the differential amplifier (DiffAmp) and two-stage operational amplifier (OpAmp). In addition, it proposes an automation framework for the higher level circuitry of the LDO. This article introduces a novel “TriNet” architecture designed for various parameters of amplifiers, including gain, bandwidth, and power facilitating precise predictions for DiffAmp and OpAmp, and presents a decoder architecture tailored for LDO. A notable aspect is the development of an efficient technique for acquiring larger datasets in a condensed timeframe. The presented methodologies demonstrate high accuracy rates, achieving 97.3% for DiffAmp and OpAmp circuits and 94.3% for LDO design.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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