低压差稳压器设计，静态电流为 20.4 μA，电源抑制能力强

IF 2.2 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2024-07-30 DOI:10.1016/j.vlsi.2024.102242

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引用次数: 0

摘要

本文介绍了一种新型低压差（LDO）稳压器，它具有高电源抑制（PSR）和低静态电流的特点。该稳压器采用了电容前馈纹波消除（CFFRC）技术，可有效消除电源噪声，同时最大限度地降低静态电流。此外，该设计还采用了前馈电容和背靠背伪电阻偏置技术，以降低功耗。此外，负反馈超级源极跟随器和米勒补偿技术的集成提高了 LDO 的稳定性。该 LDO 采用 180 纳米 CMOS 技术制造，静态电流消耗为 20.4 μA。实验结果表明，与缺乏这些增强功能的 LDO 相比，PSR 最大提高了 -41.55 dB，最大负载电流能力为 120 mA。

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A low dropout regulator design with 20.4 μA quiescent current and high power supply rejection

This paper presents a novel low dropout (LDO) regulator distinguished by its high power supply rejection (PSR) and low quiescent current. A capacitive feed-forward ripple cancellation (CFFRC) technique is introduced to effectively cancel power supply noise while simultaneously minimizing quiescent current. Additionally, the design incorporates feed-forward capacitors and back-to-back pseudo-resistors biasing to achieve reduced power consumption. Furthermore, the integration of negative feedback super source follower and Miller compensation techniques enhances the stability of the LDO. Fabricated using 180 nm CMOS technology, the LDO exhibits a quiescent current consumption of 20.4 μA. Experimental results demonstrate a maximal improvement of −41.55 dB in PSR compared to an LDO lacking these enhancements, with a maximum load current capability of 120 mA.

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.