The origin and mitigation of defects induced by metal evaporation in 2D materials

Evaporating metallic films on two-dimensional (2D) materials is a necessary process to build electronic devices, but it produces bond breaking and metal penetration in the 2D material, which degrades its properties and the figures-of-merit of the devices. Evaporating the metal in ultra-high vacuum (10⁻⁹ Torr) is a recognized method to reduce the damage, but the higher complexity and cost of the setup and its lower throughput makes developing other solutions highly desirable. All studies on ultra-high vacuum evaporation of metals on 2D materials evaluated the figures-of-merit of transistors fabricated following different protocols, with very scarce or without sub-nanometre information. Moreover, such studies employed 2D materials produced by chemical vapour deposition (CVD), which contain relatively large amounts of native defects, and hence, post-evaporation analyses do not allow identifying which defects are native and which ones are generated during metal evaporation. In this article we analyse the structure of defect-free mechanically exfoliated 2D materials via cross-sectional transmission electron microscopy (TEM) before and after Au evaporation (on top), and calculate the density of defects introduced. We find that evaporating the metal in a moderate vacuum atmosphere of 5 × 10⁻⁶ Torr is sufficient to avoid damage, leading to a nearly perfect van der Waals interface. By using density functional theory simulations we find that the presence of water molecules on the surface of the 2D material slightly distorts the position of the atoms in the crystalline hexagonal network, weakening the covalent bonds and reducing the energy for defect formation. We fabricate Au/h-BN/Au devices and observe that evaporating the Au at 5 × 10⁻⁶ Torr produces much less out-of-plane leakage current than evaporating at 3 × 10⁻⁵ Torr. The approaches here presented are easy to use and facilitate the introduction of 2D materials in electronic devices and circuits.