用于 FALCON 后量子密码学的面积和功耗高效 FFT/IFFT 处理器

IF 5.4 2区 计算机科学 Q1 COMPUTER SCIENCE, INFORMATION SYSTEMS
Ghada Alsuhli;Hani Saleh;Mahmoud Al-Qutayri;Baker Mohammad;Thanos Stouraitis
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引用次数: 0

摘要

量子计算是一项即将重塑行业的新兴技术,同时也挑战着现有的加密算法。FALCON是一种最新的标准抗量子数字签名,由于其广泛的非整数多项式运算,提出了一种具有挑战性的硬件实现,需要在环$\mathbb {Q}[x]/(x^{n}+1)$上进行FFT。本文介绍了一种针对环上FFT/IFFT操作量身定制的超低功耗紧凑型处理器,以实现高效的FALCON实现。该处理器融合了各种优化技术,包括旋转因子压缩和无冲突调度。在使用22纳米GF工艺的ASIC实现中,所提出的处理器在167 MHz/500 MHz的工作频率下的面积占用为0.15 mm$^{2}$,功耗为12.6 mW/28.1 mW。由于目前不存在环上FFT/IFFT的硬件实现,因此将该处理器实现的执行时间与使用Cortex-A72的Raspberry Pi 4上FALCON的FFT/IFFT的参考软件实现进行比较,其中提出的流水线处理器实现了高达3.8倍的加速。此外,与用于经典FFT的专用最先进硬件加速器相比,流水线架构平均占用的面积减少42%,功耗减少64%。在FALCON环境下的量化加速表明,所提出的硬件设计为FALCON的有效实现提供了一个有前途的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Area and Power Efficient FFT/IFFT Processor for FALCON Post-Quantum Cryptography
Quantum computing is an emerging technology on the verge of reshaping industries, while simultaneously challenging existing cryptographic algorithms. FALCON, a recent standard quantum-resistant digital signature, presents a challenging hardware implementation due to its extensive non-integer polynomial operations, necessitating FFT over the ring $\mathbb {Q}[x]/(x^{n}+1)$. This paper introduces an ultra-low-power and compact processor tailored for FFT/IFFT operations over the ring for efficient FALCON implementation. The proposed processor incorporates various optimization techniques, including twiddle factor compression and conflict-free scheduling. In an ASIC implementation using a 22 nm GF process, the proposed processor demonstrates an area occupancy of 0.15 mm$^{2}$ and a power consumption of 12.6 mW/28.1 mW at an operating frequency of 167 MHz/500 MHz for the non-pipelined/pipelined version of the processor. Since a hardware implementation of FFT/IFFT over the ring is currently non-existent, the execution time achieved by this processor is compared to the reference software implementation of FFT/IFFT of FALCON on a Raspberry Pi 4 with Cortex-A72, where the proposed pipelined processor achieves a speedup up to 3.8×. Furthermore, in comparison to dedicated state-of-the-art hardware accelerators for classic FFT, the pipelined architecture occupies 42% less area and consumes 64% less power, on average. The quantified speedup in the context of FALCON suggests that the proposed hardware design offers a promising solution for the efficient implementation of FALCON.
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来源期刊
IEEE Transactions on Emerging Topics in Computing
IEEE Transactions on Emerging Topics in Computing Computer Science-Computer Science (miscellaneous)
CiteScore
12.10
自引率
5.10%
发文量
113
期刊介绍: IEEE Transactions on Emerging Topics in Computing publishes papers on emerging aspects of computer science, computing technology, and computing applications not currently covered by other IEEE Computer Society Transactions. Some examples of emerging topics in computing include: IT for Green, Synthetic and organic computing structures and systems, Advanced analytics, Social/occupational computing, Location-based/client computer systems, Morphic computer design, Electronic game systems, & Health-care IT.
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