Qingkun Li , Lei Cao , Qingzhu Zhang , Lianlian Li , Xuexiang Zhang , Chuqiao Niu , Guanqiao Sang , Yunjiao Bao , Huaxiang Yin , Zhenhua Wu
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Source/drain extension asymmetric counter-doping for suppressing channel leakage in stacked nanosheet transistors
In the relentless pursuit of semiconductor device scaling, stacked silicon nanosheet gate-all-around field-effect transistors (NSFETs) are emerging as key candidates for sub-3nm technology nodes. However, the challenge of channel leakage in these devices is critical and necessitates innovative solutions. A novel SDE asymmetric counter-doping technique is proposed in this study. It investigates the impact of source/drain extension on device performance using different process schemes through three-dimensional technical computer-aided design (3D TCAD) simulations. The simulations demonstrate a comprehensive technically advantages for 25.2 %/16.65 % reduction in the off-state leakage, 27.36 %/15.03 % improvement in the on-off current ratio of N/P NSFETs, respectively. Furthermore, it shows more performance gain as the gate length scaling beyond 3 nm technology nodes. The compatibility of the asymmetric counter-doping method with mainstream NSFET integration flows and its scalability to 10 nm gate lengths indicate that it is a promising approach to optimize NSFETs performance with little extra process cost.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.