带栅极前置和场板的多势垒 E-Mode MISHEMT 的阈值电压和导通电阻的分析建模

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
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引用次数: 0

摘要

这项研究提出了一个分析模型,用于分析带有栅极隙和场板的多势垒金属绝缘体半导体高电子迁移率晶体管(MISHEMT)的阈值电压和导通电阻。该器件的特点是沟道区具有较高的二维电子气(2DEG)密度。该器件的主要目标是实现高阈值电压(Vth),并通过减轻散射和界面电荷引起的劣化效应,在特定的低导通电阻(Ron_sp)条件下提高电子迁移率。此外,还提出了一个基于物理学的 Vth 和上下沟道 2DEG 电荷密度分析模型。通过与 TCAD 数值模拟进行比较,验证了该模型的匹配性。与传统 MISHEMT 相比,所提出的 MISHEMT 在下沟道中的电子迁移率提高了 1260 cm2/V.s,Vth 达到 2.6 V,Ron_sp 降低了 33%。此外,所提出的 MISHEMT 是一种很有希望实现功率半导体器件所需的高阈值电压和高迁移率的器件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analytical modeling of threshold voltage and on-resistance in multi-barrier E-mode MISHEMT with gate-recess and field-plates

This work presents an analytical model for threshold voltage and On-resistance of multi barrier Metal–Insulator–Semiconductor High-Electron-Mobility-Transistor (MISHEMT) with gate-recess and field-plates. The device featuring a high two-dimensional electron-gas (2DEG) density in the channel region. The primary objectives of this device are to achieve a high threshold voltage (Vth) and enhance electron mobility with specific low ON-resistance (Ron_sp) by mitigating the degradation effects arising from scattering and interface-charges. Also, a physics based analytical model for Vth and 2DEG charge density at upper and lower channels is presented. This model is validated by comparing with TCAD numerical simulations and are well matched. The proposed MISHEMT demonstrates improved electron mobility in the lower channel of 1260 cm2/V.s, Vth of ∼2.6 V and Ron_sp is minimized by 33 % in contrast with a conventional MISHEMT. Additionally, the proposed MISHEMT becomes a promising device for achieving both high threshold voltage and mobility which are required for power semiconductor devices.

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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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