{"title":"基于 Si0.7Ge0.3/Si 异质结构的 n 型 GAA MOSFET 的电气特性","authors":"Pushp Raj , Kuei-Shu Chang-Liao , Pramod Kumar Tiwari","doi":"10.1016/j.mee.2024.112226","DOIUrl":null,"url":null,"abstract":"<div><p>Electrical characteristics of Si<sub>0.7</sub>Ge<sub>0.3</sub>/Si heterostructure-based n-type gate-all-around MOSFETs (GAA MOSFETs) are reported in this work through experimental and numerical simulation data. N-type GAA MOSFETs of varying lengths (60 nm to 160 nm) and widths (20 nm to 42 nm) are fabricated and measured to extract key electrical parameters like ON current, ON-to-OFF current ratio, threshold voltage, DIBL, and subthreshold swing. Moreover, the influence of tensile strain on carrier transport parameters in the buried Si layer is examined in this work. The Ge mole fraction in SiGe is raised from 0.2 to 0.3, and the corresponding changes in XX-stress, and current density are analyzed using a TCAD simulator. The performance of the proposed device has also been compared with unstrained SiGe/Si, all Si, and SiGe-based GAA MOSFETs.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"292 ","pages":"Article 112226"},"PeriodicalIF":2.6000,"publicationDate":"2024-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Electrical characteristics of Si0.7Ge0.3/Si heterostructure-based n-type GAA MOSFETs\",\"authors\":\"Pushp Raj , Kuei-Shu Chang-Liao , Pramod Kumar Tiwari\",\"doi\":\"10.1016/j.mee.2024.112226\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Electrical characteristics of Si<sub>0.7</sub>Ge<sub>0.3</sub>/Si heterostructure-based n-type gate-all-around MOSFETs (GAA MOSFETs) are reported in this work through experimental and numerical simulation data. N-type GAA MOSFETs of varying lengths (60 nm to 160 nm) and widths (20 nm to 42 nm) are fabricated and measured to extract key electrical parameters like ON current, ON-to-OFF current ratio, threshold voltage, DIBL, and subthreshold swing. Moreover, the influence of tensile strain on carrier transport parameters in the buried Si layer is examined in this work. The Ge mole fraction in SiGe is raised from 0.2 to 0.3, and the corresponding changes in XX-stress, and current density are analyzed using a TCAD simulator. The performance of the proposed device has also been compared with unstrained SiGe/Si, all Si, and SiGe-based GAA MOSFETs.</p></div>\",\"PeriodicalId\":18557,\"journal\":{\"name\":\"Microelectronic Engineering\",\"volume\":\"292 \",\"pages\":\"Article 112226\"},\"PeriodicalIF\":2.6000,\"publicationDate\":\"2024-07-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronic Engineering\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167931724000959\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronic Engineering","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167931724000959","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
本研究通过实验和数值模拟数据报告了基于 Si0.7Ge0.3/Si 异质结构的 n 型全栅极 MOSFET（GAA MOSFET）的电气特性。通过制作和测量不同长度（60 nm 至 160 nm）和宽度（20 nm 至 42 nm）的 N 型 GAA MOSFET，提取了导通电流、导通与关断电流比、阈值电压、DIBL 和阈下摆动等关键电气参数。此外，这项工作还研究了拉伸应变对埋在硅层中的载流子传输参数的影响。SiGe 中的 Ge 摩尔分数从 0.2 提高到 0.3，并使用 TCAD 模拟器分析了 XX 应力和电流密度的相应变化。此外，还将拟议器件的性能与未受约束的 SiGe/Si、全 Si 和基于 SiGe 的 GAA MOSFET 进行了比较。
Electrical characteristics of Si0.7Ge0.3/Si heterostructure-based n-type GAA MOSFETs
Electrical characteristics of Si0.7Ge0.3/Si heterostructure-based n-type gate-all-around MOSFETs (GAA MOSFETs) are reported in this work through experimental and numerical simulation data. N-type GAA MOSFETs of varying lengths (60 nm to 160 nm) and widths (20 nm to 42 nm) are fabricated and measured to extract key electrical parameters like ON current, ON-to-OFF current ratio, threshold voltage, DIBL, and subthreshold swing. Moreover, the influence of tensile strain on carrier transport parameters in the buried Si layer is examined in this work. The Ge mole fraction in SiGe is raised from 0.2 to 0.3, and the corresponding changes in XX-stress, and current density are analyzed using a TCAD simulator. The performance of the proposed device has also been compared with unstrained SiGe/Si, all Si, and SiGe-based GAA MOSFETs.
期刊介绍：
Microelectronic Engineering is the premier nanoprocessing, and nanotechnology journal focusing on fabrication of electronic, photonic, bioelectronic, electromechanic and fluidic devices and systems, and their applications in the broad areas of electronics, photonics, energy, life sciences, and environment. It covers also the expanding interdisciplinary field of "more than Moore" and "beyond Moore" integrated nanoelectronics / photonics and micro-/nano-/bio-systems. Through its unique mixture of peer-reviewed articles, reviews, accelerated publications, short and Technical notes, and the latest research news on key developments, Microelectronic Engineering provides comprehensive coverage of this exciting, interdisciplinary and dynamic new field for researchers in academia and professionals in industry.
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