具有轻负载效率改进和无缝模式转换技术的双模降压转换器

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Chengzhi Xu;Xufeng Liao;Peiyuan Fu;Yongyuan Li;Lianxi Liu
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引用次数: 0

摘要

为了提高宽负载范围内的效率,物联网(IoT)电源转换器通常采用双模式工作,即脉宽调制(PWM)和脉冲频率调制(PFM)。采用混合负载检测方案可在不同负载下启用适当的模式,其模拟检测器可在重负载下进行精确检测,而数字负载检测可提高轻负载效率。当功率转换器工作在不同模式时,控制回路也不同。同时,本文提出了一种无缝模式转换技术(SMTT),以改善 PWM 和 PFM 模式转换时的瞬态响应。测试芯片采用 0.18- $\mu $ m 标准 CMOS 工艺制造,芯片面积为 1.59 美元乘 1.37 美元 mm2。实验结果表明,在 $V_{\text {IN}}=3.3$ V、$V_{\text {OUT}}=1.8$ V、负载范围为 1 至 300 mA 的条件下,效率高于 85.3%;在负载为 100 mA 时,峰值效率可达 96.1%。与未采用拟议技术的情况相比,模式转换期间的欠/过冲电压可降低 55% 以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Dual-Mode Buck Converter with Light-Load Efficiency Improvement and Seamless Mode Transition Technique
In order to improve the efficiency over a wide load range, a power converter of the Internet of Things (IoT) usually works in dual modes, which are pulsewidth modulation (PWM) and pulse frequency modulation (PFM). A mixed load detection scheme is adopted to enable the appropriate modes under different loads, whose analog detector has an accurate detection in the heavy load, and the digital load detection improves the light-load efficiency. When the power converter operates in different modes, the control loops are different. Meanwhile, a seamless mode transition technique (SMTT) is presented in this article to improve the transient response during mode change between PWM and PFM. A test chip was fabricated in a 0.18- $\mu $ m standard CMOS process, and the chip area is $1.59\times 1.37$ mm2. The experimental results show that the efficiency is above 85.3% under $V_{\text {IN}}=3.3$ V, $V_{\text {OUT}}=1.8$ V, and in the load range from 1 to 300 mA, while peak efficiency can reach 96.1% at 100-mA load. Compared to the case without the proposed technique, the under/overshoot voltage can be reduced by above 55% during the mode transition.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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