{"title":"沉积温度对固相结晶 Ge 薄膜电学特性的影响","authors":"Youngho Cho, Mingjun Jiang, Donghwan Ahn, Woong Choi","doi":"10.1007/s13391-024-00506-y","DOIUrl":null,"url":null,"abstract":"<div><p>We report the effect of deposition temperature, spanning from 30 °C to 200 °C, on the electrical properties of solid-phase crystallized Ge thin films on SiO<sub>2</sub>/Si substrates. Our findings revealed three distinct ranges of deposition temperature, each exhibiting unique electrical properties. The initial thin films were amorphous with low density in the first range (below 100 °C), amorphous with high density in the second range (between 100 °C and 160 °C), and crystalline with high density in the third range (above 160 °C). In the first and second ranges, an increase in deposition temperature led to a fivefold increase in Hall mobility. This was attributed to the enlarged grain size and reduced energy barrier at grain boundaries possibly owing to the reduced concentration of oxygen impurities. Grain boundary scattering dominated carrier transport in the first range, while diminished energy barrier in the second range effectively mitigated grain boundary scattering. In the third range, an increase in deposition temperature resulted in a decrease in the Hall mobility. This may be linked to the reduced grain size. These results demonstrate the profound impact of deposition temperature on tailoring the electrical properties of polycrystalline Ge thin films, with potential implications for semiconductor processing.</p></div>","PeriodicalId":536,"journal":{"name":"Electronic Materials Letters","volume":"20 6","pages":"694 - 701"},"PeriodicalIF":2.1000,"publicationDate":"2024-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Effect of Deposition Temperature on the Electrical Properties of Solid-Phase Crystallized Ge Thin Films\",\"authors\":\"Youngho Cho, Mingjun Jiang, Donghwan Ahn, Woong Choi\",\"doi\":\"10.1007/s13391-024-00506-y\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>We report the effect of deposition temperature, spanning from 30 °C to 200 °C, on the electrical properties of solid-phase crystallized Ge thin films on SiO<sub>2</sub>/Si substrates. Our findings revealed three distinct ranges of deposition temperature, each exhibiting unique electrical properties. The initial thin films were amorphous with low density in the first range (below 100 °C), amorphous with high density in the second range (between 100 °C and 160 °C), and crystalline with high density in the third range (above 160 °C). In the first and second ranges, an increase in deposition temperature led to a fivefold increase in Hall mobility. This was attributed to the enlarged grain size and reduced energy barrier at grain boundaries possibly owing to the reduced concentration of oxygen impurities. Grain boundary scattering dominated carrier transport in the first range, while diminished energy barrier in the second range effectively mitigated grain boundary scattering. In the third range, an increase in deposition temperature resulted in a decrease in the Hall mobility. This may be linked to the reduced grain size. These results demonstrate the profound impact of deposition temperature on tailoring the electrical properties of polycrystalline Ge thin films, with potential implications for semiconductor processing.</p></div>\",\"PeriodicalId\":536,\"journal\":{\"name\":\"Electronic Materials Letters\",\"volume\":\"20 6\",\"pages\":\"694 - 701\"},\"PeriodicalIF\":2.1000,\"publicationDate\":\"2024-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electronic Materials Letters\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s13391-024-00506-y\",\"RegionNum\":4,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"MATERIALS SCIENCE, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electronic Materials Letters","FirstCategoryId":"88","ListUrlMain":"https://link.springer.com/article/10.1007/s13391-024-00506-y","RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
引用次数: 0
摘要
我们报告了沉积温度(从 30 °C 到 200 °C)对二氧化硅/硅基底上固相结晶 Ge 薄膜电性能的影响。我们的研究结果揭示了三个不同的沉积温度范围,每个范围都表现出独特的电学特性。初始薄膜在第一个温度范围(低于 100 °C)为低密度无定形薄膜,在第二个温度范围(介于 100 °C和 160 °C之间)为高密度无定形薄膜,在第三个温度范围(高于 160 °C)为高密度结晶薄膜。在第一和第二范围内,沉积温度的升高导致霍尔迁移率增加了五倍。这可能是由于氧杂质浓度降低导致晶粒尺寸增大和晶界能垒降低。在第一个范围内,晶界散射主导了载流子的传输,而在第二个范围内,能垒的减弱有效地缓解了晶界散射。在第三个范围,沉积温度的升高导致霍尔迁移率的降低。这可能与晶粒尺寸减小有关。这些结果证明了沉积温度对定制多晶锗薄膜电学特性的深远影响,对半导体加工具有潜在的意义。
Effect of Deposition Temperature on the Electrical Properties of Solid-Phase Crystallized Ge Thin Films
We report the effect of deposition temperature, spanning from 30 °C to 200 °C, on the electrical properties of solid-phase crystallized Ge thin films on SiO2/Si substrates. Our findings revealed three distinct ranges of deposition temperature, each exhibiting unique electrical properties. The initial thin films were amorphous with low density in the first range (below 100 °C), amorphous with high density in the second range (between 100 °C and 160 °C), and crystalline with high density in the third range (above 160 °C). In the first and second ranges, an increase in deposition temperature led to a fivefold increase in Hall mobility. This was attributed to the enlarged grain size and reduced energy barrier at grain boundaries possibly owing to the reduced concentration of oxygen impurities. Grain boundary scattering dominated carrier transport in the first range, while diminished energy barrier in the second range effectively mitigated grain boundary scattering. In the third range, an increase in deposition temperature resulted in a decrease in the Hall mobility. This may be linked to the reduced grain size. These results demonstrate the profound impact of deposition temperature on tailoring the electrical properties of polycrystalline Ge thin films, with potential implications for semiconductor processing.
期刊介绍:
Electronic Materials Letters is an official journal of the Korean Institute of Metals and Materials. It is a peer-reviewed international journal publishing print and online version. It covers all disciplines of research and technology in electronic materials. Emphasis is placed on science, engineering and applications of advanced materials, including electronic, magnetic, optical, organic, electrochemical, mechanical, and nanoscale materials. The aspects of synthesis and processing include thin films, nanostructures, self assembly, and bulk, all related to thermodynamics, kinetics and/or modeling.