Jie Zhang, Xiaodong Wei, Jiangang Zuo, Nana Cheng, Jiliang Lv
{"title":"基于忆阻器的多卷混沌吸引器的设计与应用","authors":"Jie Zhang, Xiaodong Wei, Jiangang Zuo, Nana Cheng, Jiliang Lv","doi":"10.1016/j.vlsi.2024.102235","DOIUrl":null,"url":null,"abstract":"<div><p>A multi-segment nonlinear memristor model with controllable parameters is simplified significantly reducing circuit costs without compromising circuit performance. Different quantities of simplified memristor models are introduced into an improved Shimizu and Morioka (S-M) system, which constitute the one-directional memristive multiscroll chaotic attractor (1D-MMSCA) and the two-directional memristive multiscroll chaotic attractor (2D-MMSCA). Dynamical analysis is conducted from equilibrium points, Lyapunov exponents and bifurcation diagrams, Poincaré map, 0–1 tests, complexity, coexisting attractors, and National Institute of Standards and Technology (NIST) test. The Lyapunov exponents and bifurcation diagrams revealed that 1D-MMSCA exhibit rich dynamical behaviors, including fixed points, periodic orbits, transient quasi-periodic cycles, limit cycles, and period-doubling bifurcations. The 2D-MMSCA demonstrates simultaneous homogeneous and heterogeneous multi-stability and extreme multi-stability. Furthermore, an analog circuit is designed and simulated, and the results verify the circuit realizability and correctness of the MMSCAs. By utilizing an improved Euler algorithm and STM32 microcontroller, the implementation of MMSCAs are achieved, enhancing their applicability in the embedded systems domain. Finally, the drive-response synchronization constructed based on 1D-MMSCA exhibits a wide adjustable synchronization time, ranging from 49.3 s to 0.18 s. This significantly expands the application scope of the system. Additionally, a chaotic analog encrypted communication system has been developed using this synchronization framework. These advancements substantially enhance both the efficiency and practicality of the synchronization system.</p></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and application of multiscroll chaotic attractors based on memristors\",\"authors\":\"Jie Zhang, Xiaodong Wei, Jiangang Zuo, Nana Cheng, Jiliang Lv\",\"doi\":\"10.1016/j.vlsi.2024.102235\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>A multi-segment nonlinear memristor model with controllable parameters is simplified significantly reducing circuit costs without compromising circuit performance. Different quantities of simplified memristor models are introduced into an improved Shimizu and Morioka (S-M) system, which constitute the one-directional memristive multiscroll chaotic attractor (1D-MMSCA) and the two-directional memristive multiscroll chaotic attractor (2D-MMSCA). Dynamical analysis is conducted from equilibrium points, Lyapunov exponents and bifurcation diagrams, Poincaré map, 0–1 tests, complexity, coexisting attractors, and National Institute of Standards and Technology (NIST) test. The Lyapunov exponents and bifurcation diagrams revealed that 1D-MMSCA exhibit rich dynamical behaviors, including fixed points, periodic orbits, transient quasi-periodic cycles, limit cycles, and period-doubling bifurcations. The 2D-MMSCA demonstrates simultaneous homogeneous and heterogeneous multi-stability and extreme multi-stability. Furthermore, an analog circuit is designed and simulated, and the results verify the circuit realizability and correctness of the MMSCAs. By utilizing an improved Euler algorithm and STM32 microcontroller, the implementation of MMSCAs are achieved, enhancing their applicability in the embedded systems domain. Finally, the drive-response synchronization constructed based on 1D-MMSCA exhibits a wide adjustable synchronization time, ranging from 49.3 s to 0.18 s. This significantly expands the application scope of the system. Additionally, a chaotic analog encrypted communication system has been developed using this synchronization framework. These advancements substantially enhance both the efficiency and practicality of the synchronization system.</p></div>\",\"PeriodicalId\":54973,\"journal\":{\"name\":\"Integration-The Vlsi Journal\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-06-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Integration-The Vlsi Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167926024000993\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926024000993","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Design and application of multiscroll chaotic attractors based on memristors
A multi-segment nonlinear memristor model with controllable parameters is simplified significantly reducing circuit costs without compromising circuit performance. Different quantities of simplified memristor models are introduced into an improved Shimizu and Morioka (S-M) system, which constitute the one-directional memristive multiscroll chaotic attractor (1D-MMSCA) and the two-directional memristive multiscroll chaotic attractor (2D-MMSCA). Dynamical analysis is conducted from equilibrium points, Lyapunov exponents and bifurcation diagrams, Poincaré map, 0–1 tests, complexity, coexisting attractors, and National Institute of Standards and Technology (NIST) test. The Lyapunov exponents and bifurcation diagrams revealed that 1D-MMSCA exhibit rich dynamical behaviors, including fixed points, periodic orbits, transient quasi-periodic cycles, limit cycles, and period-doubling bifurcations. The 2D-MMSCA demonstrates simultaneous homogeneous and heterogeneous multi-stability and extreme multi-stability. Furthermore, an analog circuit is designed and simulated, and the results verify the circuit realizability and correctness of the MMSCAs. By utilizing an improved Euler algorithm and STM32 microcontroller, the implementation of MMSCAs are achieved, enhancing their applicability in the embedded systems domain. Finally, the drive-response synchronization constructed based on 1D-MMSCA exhibits a wide adjustable synchronization time, ranging from 49.3 s to 0.18 s. This significantly expands the application scope of the system. Additionally, a chaotic analog encrypted communication system has been developed using this synchronization framework. These advancements substantially enhance both the efficiency and practicality of the synchronization system.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.