LACT:活泼感知检查点,减少间歇性系统中的检查点开销

IF 3.7 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Youngbin Kim, Yoojin Lim, Chaedeok Lim
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引用次数: 0

摘要

间歇计算支持频繁断电的系统执行,例如由能量收集供电的无电池设备。在此类系统中,检查点和恢复是一种普遍采用的技术,即定期将易失性系统状态保存到非易失性存储器(NVM)中,以便在电源周期之间保持计算进度。由于检查点涉及大量的非易失性存储器访问,在延迟和能耗方面都很昂贵,因此减少其开销一直是一项重大的研究挑战。本文提出了一种编译器优化技术 LACT(Liveness-Aware CheckpoinTing),用于最大限度地减少间歇系统中的检查点开销。在执行检查点时,一般存在死值,这些死值在未来不会被使用或覆盖。LACT 基于编译时分析来检查此类有效性信息,尤其是数组中的有效性信息,并将死值从检查点中排除,从而减少所需的检查点数据,这是以前从未探索过的优化机会。我们的评估表明,LACT 无需任何运行时支持,即可减少 46.4% 的所需检查点数据,从而缩短 31.5% 的执行时间,平均降低 5.2% 的功耗。我们在实际能源收集环境中的实验表明,这种改进可将端到端执行时间缩短 31.6%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
LACT: Liveness-Aware Checkpointing to reduce checkpoint overheads in intermittent systems

Intermittent computing supports execution of the systems experiencing frequent power failures, such as battery-less devices powered by energy-harvesting. In such systems, checkpoint and recovery is a commonly adopted technique, where volatile system states are regularly saved to Non-Volatile Memory (NVM), to preserve computing progress between power cycles. Since checkpoint involves a large number of NVM accesses, which is expensive in terms of both latency and energy, reducing its overhead has been a significant research challenge. In this paper, we present LACT (Liveness-Aware CheckpoinTing), a compiler optimization technique to minimize checkpoint overhead in intermittent systems. At the time of checkpoint execution, there exist dead values in general, which will not be used or overwritten in the future. LACT examines such liveness information, especially in arrays, based on compile-time analysis and excludes the dead values from the checkpoint to reduce required checkpoint data, which is a previously unexplored optimization opportunity. Our evaluation shows that LACT can reduce 46.4% of required checkpoint data without any runtime support, leading to reduction of 31.5% in execution time and a 5.2% decrease in power consumption on average. Our experiments in real energy-harvesting environment demonstrates that such improvement translates to a 31.6% improvement in end-to-end execution time.

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来源期刊
Journal of Systems Architecture
Journal of Systems Architecture 工程技术-计算机:硬件
CiteScore
8.70
自引率
15.60%
发文量
226
审稿时长
46 days
期刊介绍: The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software. Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.
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