考虑实际体积管理和通道存储的微流控生物芯片物理设计

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Genggeng Liu , Zhengyang Chen , Zhisheng Chen , Bowen Liu , Yu Zhang , Xing Huang
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引用次数: 0

摘要

近年来,微流控生物芯片已广泛应用于人类社会的各个领域。基于连续流微流控生物芯片的系统架构优化设计已被广泛研究。然而,以往的工作大多基于专用存储的传统芯片架构,这不仅限制了生物芯片的性能,还增加了其制造成本。为了提高执行效率并降低制造成本,可以采用分布式通道存储架构,在空闲的流动通道中临时缓存中间流体。在这种架构下,仔细考虑缓存液体的体积管理是确保生物测定结果可靠性的前提。然而,现有工作并未详细考虑待缓存流体的体积管理问题。这可能会导致液体体积与存储通道的容量不匹配,从而污染其他液体,导致生物测定结果错误,或因存储通道过长而增加生物芯片的制造成本。在本文中,我们提出了一种微流控生物芯片的物理设计方法,该方法在利用分布式通道存储的同时考虑了流体的实际体积。我们通过在模拟退火算法的整个迭代过程中采取放置和路由协同设计策略来解决这一问题。多种基准下的实验结果表明,所提出的方法能有效缩短生物测定的完成时间,最大限度地减少流路长度和交叉点数量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Physical design for microfluidic biochips considering actual volume management and channel storage

In recent years, microfluidic biochips have been widely applied in various fields of human society. The optimization design of system-architecture based on continuous-flow microfluidic biochips has been widely studied. However, most previous work was based on the traditional chip architecture with dedicated storage, which not only limits the performance of biochips but also increases their manufacturing costs. In order to improve the execution efficiency and reduce the manufacturing cost, a distributed channel-storage architecture can be used to temporarily cache intermediate fluids in idle flow channels. Under this architecture, careful consideration of the volume management of the fluid to be cached is a prerequisite for ensuring the reliability of bioassay results. However, the existing work has not considered the volume management of the fluid to be cached in detail. This may cause the volume of the fluid to not match the capacity of the storage channel, which can contaminate other fluids and lead to incorrect bioassay results or increase the manufacturing cost of biochips due to long storage channels. In this paper, we propose a physical design method for microfluidic biochips that considers the actual volume of fluid while utilizing distributed channel storage. We address this problem by taking a placement and routing co-design strategy throughout the iterative process of the simulated annealing algorithm. Experimental results under multiple benchmarks show that the proposed method can effectively reduce the completion time of bioassays, minimize the flow path length, and decrease the number of intersections.

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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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