具有温度自适应方案的伪电阻器

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Aliaa Mohamed Salem , Ahmed Wahba , Hesham F.A. Hamed , Ahmed Reda Mohamed
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引用次数: 0

摘要

本文提出了一种温度自适应超高阻伪电阻(PR)电路,可广泛应用于生物医学领域。由于它具有补偿温度引起的电流影响的潜力,因此在较宽的温度范围(-40 ℃-85 ℃)内可充当相对恒定的电阻器。因此,许多生物医学模拟知识产权 (IP) 电路的性能可随温度变化而得到有效改善。所提出的电路由一个栅压控制伪电阻和一个绝对温度比例(PTAT)电路组成。此外,还介绍了对自适应方案的分析和概念验证。电路采用标准 0.18 μm CMOS 技术设计,硅面积为 18.5 × 43.7 μm2。布局后仿真结果表明,与现有技术相比,所提出的伪电阻器可将温度引起的电阻变化充分改善达 18 倍,同时具有超低功耗和相对的高温独立性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A pseudo resistor with temperature self-adaptive scheme

A temperature self-adaptive ultra-high-resistance pseudo-resistor (PR) circuit is proposed for a wide range of biomedical applications. It acts as a relatively constant resistor over a wide temperature range (−40 °C–85 °C) due to its potential to compensate for the impact of the temperature-induced current. Hence, the performance of many biomedical analog intellectual property (IP) circuits can be effectively improved with temperature variations. The proposed circuit consists of a gate-voltage-controlled pseudo-resistor and a proportional-to- absolute-temperature (PTAT) circuit. Besides, its analysis and proof of concept with the self-adaptive scheme are presented. The circuit is designed in standard 0.18 μm CMOS technology and occupies a silicon area of 18.5 × 43.7 μm2. It consumes 12 nW with a single power supply of 1.8 V. The post-layout simulation results demonstrate that the proposed pseudo-resistor could adequately improve the temperature-induced resistance variation by up to 18X while consuming ultra-low power and providing relatively high-temperature independence compared to the prior art.

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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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