基于忆阻器-二极管交叉条和 CMOS 外围的逻辑器件,作为硬件神经网络的尖峰路由器

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
A.N. Busygin , S. Yu Udovichenko , A.D. Pisarev , A.H.A. Ebrahim , A.A. Gubin
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引用次数: 0

摘要

我们开发了一种基于忆阻器二极管交叉条和 CMOS 逻辑的可编程逻辑器件。该交叉条利用忆阻器比率逻辑和 CMOS 反相器实现了 NAND 逻辑门。数字控制的外围电路提供数字信号传输,并允许修改和评估横条上的忆阻器状态。与已知的类似电路相比,拟议的逻辑器件电路所需的晶体管数量更少,在芯片上所占的面积也更小。忆阻器二极管横条中逻辑电平电压的衰减是造成尺寸受限的原因。在模拟逻辑运算的执行、单个忆阻器的修改和评估状态的过程中,证明了外围电路作为逻辑器件完整电路的一部分的可操作性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A logic device based on memristor-diode crossbar and CMOS periphery as spike router for hardware neural network

A programmable logic device based on a memristor-diode crossbar and CMOS logic has been developed. The crossbar implements NAND logic gates using memristor ratioed logic and CMOS inverters. The digitally controlled peripheral circuit provides digital signals transmission and allows modification and evaluation memristor states in the crossbar. The proposed logic device circuit requires fewer transistors than known analogues and less area on the chip.

The maximum size of the crossbar in a logic device is estimated by numerical simulation at the level of electrical circuits. The limited size is caused by the degradation of the logic levels voltages in the memristor-diode crossbar. The operability of peripheral circuits as part of a complete electrical circuit of a logic device is demonstrated during the simulation of the execution of logical operations, the processes of modification and evaluation states of individual memristors.

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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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