Comparison of Single Event Effect and Space Electrostatic Discharge Effect on FPGA Signal Transmission

As the central control component in aerospace products, SRAM-based FPGA finds extensive application in space. In its operational context, the space radiation environment introduces single event effect (SEE) and space electrostatic discharge effect (SESD) in FPGAs. This paper investigates SEE and SESD in SRAM-based FPGA using an integrated simulation method that combines device-level and circuit-level analyses. The findings reveal that the distinction in signal transmission primarily lies in the number of upsets and their correlation with the initial state. SEE can lead to single-bit or multi-bit upsets in SRAM, while SESD typically induces multi-bit upsets (MBU) in SRAM. Furthermore, the logic upset caused by SEE exhibits almost no correlation with the initial state of SRAM. Conversely, the upset caused by SESD is linked to the initial state, and the threshold voltage of Single Event Upsets (SEU) in different initial states is not uniform.