Calvin Ling, Taufik Azahari, M. A. Abas, Fei Chong Ng
{"title":"利用机器学习对大量球栅阵列芯片底部填充物空洞的相关性研究","authors":"Calvin Ling, Taufik Azahari, M. A. Abas, Fei Chong Ng","doi":"10.1115/1.4065077","DOIUrl":null,"url":null,"abstract":"\n This paper investigates voiding issues in the underfilling process of ball grid array (BGA) chip packages under various parameter settings such as chip conveyor speed, valve pressure, temperature, and dispense pattern complicate. The study identifies valve pressure as the primary cause of voiding in large quantity BGA chips, achieving 88.9% in accuracy, supported with the deformation of the valve nozzle. Additionally, the findings reveal that racing effects occurs due to asymmetry of the solder ball array arrangement with percentage difference between the TSAM BGA chips experiments and its simulation counterparts in the range of 0.089% to 3.65%.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Correlation Study On Voiding in Underfill of Large Quantity Ball Grid Array Chip Using Machine Learning\",\"authors\":\"Calvin Ling, Taufik Azahari, M. A. Abas, Fei Chong Ng\",\"doi\":\"10.1115/1.4065077\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n This paper investigates voiding issues in the underfilling process of ball grid array (BGA) chip packages under various parameter settings such as chip conveyor speed, valve pressure, temperature, and dispense pattern complicate. The study identifies valve pressure as the primary cause of voiding in large quantity BGA chips, achieving 88.9% in accuracy, supported with the deformation of the valve nozzle. Additionally, the findings reveal that racing effects occurs due to asymmetry of the solder ball array arrangement with percentage difference between the TSAM BGA chips experiments and its simulation counterparts in the range of 0.089% to 3.65%.\",\"PeriodicalId\":15663,\"journal\":{\"name\":\"Journal of Electronic Packaging\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Electronic Packaging\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1115/1.4065077\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Electronic Packaging","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1115/1.4065077","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Correlation Study On Voiding in Underfill of Large Quantity Ball Grid Array Chip Using Machine Learning
This paper investigates voiding issues in the underfilling process of ball grid array (BGA) chip packages under various parameter settings such as chip conveyor speed, valve pressure, temperature, and dispense pattern complicate. The study identifies valve pressure as the primary cause of voiding in large quantity BGA chips, achieving 88.9% in accuracy, supported with the deformation of the valve nozzle. Additionally, the findings reveal that racing effects occurs due to asymmetry of the solder ball array arrangement with percentage difference between the TSAM BGA chips experiments and its simulation counterparts in the range of 0.089% to 3.65%.
期刊介绍:
The Journal of Electronic Packaging publishes papers that use experimental and theoretical (analytical and computer-aided) methods, approaches, and techniques to address and solve various mechanical, materials, and reliability problems encountered in the analysis, design, manufacturing, testing, and operation of electronic and photonics components, devices, and systems.
Scope: Microsystems packaging; Systems integration; Flexible electronics; Materials with nano structures and in general small scale systems.