{"title":"具有功率脉冲缓冲器的高功率密度板载充电器","authors":"Hector Sarnago;Oscar Lucía","doi":"10.1109/OJPEL.2024.3359271","DOIUrl":null,"url":null,"abstract":"Power electronics plays a key role in electric vehicle technology in areas such as the battery charging and managing, dc distribution and motor drive systems, among others. There are, however, significant challenges to be addressed in terms of cost, performance, reliability and power density. This paper aims at proposing an improved on-board charger architecture taking advantage of a power pulsating buffer topology. The proposed architecture will enable to significantly reduce the dc-link capacitor size, enabling a change in its technology, and leading to a higher power density and higher reliability implementation. The proposed architecture is analyzed, its main design considerations are discussed and, finally, a 3.6-kW experimental prototype is designed and implemented to prove the feasibility of this proposal. As a conclusion, the proposed topology is recommended as a high-performance high-power-density OBC implementation for future EVs.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0000,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10415508","citationCount":"0","resultStr":"{\"title\":\"High Power Density On-Board Charger Featuring Power Pulsating Buffer\",\"authors\":\"Hector Sarnago;Oscar Lucía\",\"doi\":\"10.1109/OJPEL.2024.3359271\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power electronics plays a key role in electric vehicle technology in areas such as the battery charging and managing, dc distribution and motor drive systems, among others. There are, however, significant challenges to be addressed in terms of cost, performance, reliability and power density. This paper aims at proposing an improved on-board charger architecture taking advantage of a power pulsating buffer topology. The proposed architecture will enable to significantly reduce the dc-link capacitor size, enabling a change in its technology, and leading to a higher power density and higher reliability implementation. The proposed architecture is analyzed, its main design considerations are discussed and, finally, a 3.6-kW experimental prototype is designed and implemented to prove the feasibility of this proposal. As a conclusion, the proposed topology is recommended as a high-performance high-power-density OBC implementation for future EVs.\",\"PeriodicalId\":93182,\"journal\":{\"name\":\"IEEE open journal of power electronics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":5.0000,\"publicationDate\":\"2024-01-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10415508\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE open journal of power electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10415508/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of power electronics","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10415508/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
High Power Density On-Board Charger Featuring Power Pulsating Buffer
Power electronics plays a key role in electric vehicle technology in areas such as the battery charging and managing, dc distribution and motor drive systems, among others. There are, however, significant challenges to be addressed in terms of cost, performance, reliability and power density. This paper aims at proposing an improved on-board charger architecture taking advantage of a power pulsating buffer topology. The proposed architecture will enable to significantly reduce the dc-link capacitor size, enabling a change in its technology, and leading to a higher power density and higher reliability implementation. The proposed architecture is analyzed, its main design considerations are discussed and, finally, a 3.6-kW experimental prototype is designed and implemented to prove the feasibility of this proposal. As a conclusion, the proposed topology is recommended as a high-performance high-power-density OBC implementation for future EVs.