Design and simulation of a new current mirror circuit with low power consumption and high performance and output impedance

Analog and digital integrated circuit performance has greatly benefited by the shrinking of semiconductor fabrication technology components. In order to reduce the size of the transistors, it is obvious that the speed of the circuits must increase and the supply voltage must decrease. Although this decreases the power consumption of the circuits, it typically reduces the characteristics of analog circuits, such as dynamic range and output resistance. The gift In this study, a novel wide bandwidth current mirror with low power consumption, low voltage, and super high voltage swing are given. The proposed design calls for a current mirror bandwidth of 168 MHz. Additionally, the output impedance for the proposed circuit, which is exceptionally high and is close to 175 MΩ according to the simulation results, guarantees the high accuracy of the suggested current mirror current. The suggested circuit design's low power consumption of 42.4 μW, lowest output voltage of 100 mV, and maximum swing limit of 850 mV all demonstrate that they are ideally suited for low power/operational voltage applications and ultra-low voltage circuit design. And resists less-than-ideal PVT circumstances. The capability of this technique to achieve high-speed current mirror and high-current driving capabilities with few accuracy or power performance restrictions is demonstrated in this work. It is implemented in 0.18 m AMS CMOS technology with a 1 V supply voltage and offers a high output current with a relative current copy error of 2% and a maximum settling time of 2–4 ns, making it well suited for the implementation of quick and balanced multipole current sources.