为频率扫描干涉仪远程测量设计基于 FPGA 的高速数据采集系统

Sivagunalan Sivanathan;Mohammed Ali Roula;Kang Li;Dun Qiao;Nigel Joseph Copner
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引用次数: 0

摘要

频率扫描干涉测量法(FSI)已成为基于目标的远距离测量的常用方法。然而,开发此类系统的成本,尤其是高速数据采集(DAQ)所需的电子元件,仍然是一个重大问题。在本文中,我们介绍了一种基于 FPGA 的高性价比实时 DAQ 系统,该系统专为 FSI 设计,重点用于长距离绝对距离测量。我们的设计最大限度地减少了第三方知识产权(IP)的使用,并与 Xilinx FPGA 7 系列产品完全兼容。硬件采用 160-MS/s 16 位双通道 ADC,通过低压差分信号 (LVDS) 与 FPGA 连接。拟议的系统采用了外部采样时钟(称为 K-时钟),它使激光器的调谐速率线性化,从而能够以相等的光频间隔而不是相等的时间间隔对光学测量进行采样。此外,我们还介绍了用于前端模拟信号接口和与所选 FPGA 的 LVDS 连接的 160-MS/s 高速 ADC 模块的设计。我们演示了数字化数据采样可以通过 USB 接口高效地传输到偏振控制器 (PC) 应用程序,以便进一步处理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of an FPGA-Based High-Speed Data Acquisition System for Frequency Scanning Interferometry Long-Range Measurement
Frequency scanning interferometry (FSI) has become a popular method for long-range, targetbased, distance measurements. However, the cost of developing such systems, particularly the electronic components required for high-speed data acquisition (DAQ), remains a significant concern. In this article, we present a cost-effective, FPGA-based real-time DAQ system specifically designed for FSI, with a focus on long absolute distance measurements. Our design minimizes the use of third-party intellectual property (IP) and is fully compatible with the Xilinx FPGA 7 series families. The hardware employs a 160-MS/s, 16-bit dual-channel ADC interfaced to the FPGA via a low-voltage differential signaling (LVDS). The proposed system incorporates an external sampling clock, referred to as the K-clock, which linearizes the laser’s tuning rate, enabling optical measurements to be sampled at equal optical frequency intervals rather than equal time intervals. Additionally, we present the design of a high-speed, 160-MS/s ADC module for the front-end analog signal interface and the LVDS connection to the chosen FPGA. We demonstrate that the digitized data samples can be efficiently transmitted to a polarization controller (PC) application via a USB interface for further processing.
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