Incorporating DC bias voltage in poly-harmonic distortion modeling for RF power GaN transistors

This paper presents a novel poly-harmonic distortion (PHD) model that incorporates the DC input and output bias voltages using Gaussian process regression (GPR). Simulation tests were conducted using a 10-W gallium nitride (GaN) HEMT transistor from Wolfspeed, and the model implementation test was performed in the Keysight Advanced Design System environment. The results showed that the GPR-based PHD model exhibited good performance in predicting both fundamental and harmonic behaviors over a wide range of bias variations with significant advantages over basic linear regression methods. Additionally, the model accurately predicted load-pull simulations. The measurement test was conducted using a 6-W GaN device, and the results showed a mean error of 2.22% and 4.54% for the fundamental and second harmonic of the reflected wave, respectively.