{"title":"使用准浮动自级联输出级的低电压高带宽 FVF 电流镜","authors":"Narsaiah Domala, G. Sasikala, Nikhil Raj","doi":"10.1007/s10470-023-02205-4","DOIUrl":null,"url":null,"abstract":"<div><p>Current mirrors with ideal performance are widely in demand for realizing low power applications. In this paper, an FVF current mirror is proposed to have high bandwidth, low input, and boosted output resistance. The low voltage operation is confirmed using flipped voltage follower at the input. Also at the input, a local negative feedback loop is created which reduces the input node resistance and the achieved value ranges below an ohm. The output stage consists of a regulated cascode and a super cascode topology which is driven by an inverting amplifier realized using a self-cascode structure to improve the output resistance. However, instead of using the traditional gate-driven self-cascode, the proposed design uses its quasi-floating gate MOS transistor-based structure which further improves the output resistance and bandwidth. The proposed current mirror operates with minimum error in the range of 0–1000 µA. The bandwidth of the proposed circuit ranges in gigahertz which is 3.1 GHz. The resistance at the input is found as 0.407 Ω whereas the output has boosted resistance to a Giga ohm value which is 86 GΩ. The stability and robustness analysis is done via temperature, process corners and Monte Carlo runs. The complete design is done using the MOSFET model of UMC in 0.18-micron technology at <span>\\(\\pm\\)</span> 0.5 V with the help of HSpice.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"119 1","pages":"15 - 27"},"PeriodicalIF":1.2000,"publicationDate":"2023-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low voltage high bandwidth FVF current mirror using quasi floating self-cascode output stage\",\"authors\":\"Narsaiah Domala, G. Sasikala, Nikhil Raj\",\"doi\":\"10.1007/s10470-023-02205-4\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Current mirrors with ideal performance are widely in demand for realizing low power applications. In this paper, an FVF current mirror is proposed to have high bandwidth, low input, and boosted output resistance. The low voltage operation is confirmed using flipped voltage follower at the input. Also at the input, a local negative feedback loop is created which reduces the input node resistance and the achieved value ranges below an ohm. The output stage consists of a regulated cascode and a super cascode topology which is driven by an inverting amplifier realized using a self-cascode structure to improve the output resistance. However, instead of using the traditional gate-driven self-cascode, the proposed design uses its quasi-floating gate MOS transistor-based structure which further improves the output resistance and bandwidth. The proposed current mirror operates with minimum error in the range of 0–1000 µA. The bandwidth of the proposed circuit ranges in gigahertz which is 3.1 GHz. The resistance at the input is found as 0.407 Ω whereas the output has boosted resistance to a Giga ohm value which is 86 GΩ. The stability and robustness analysis is done via temperature, process corners and Monte Carlo runs. The complete design is done using the MOSFET model of UMC in 0.18-micron technology at <span>\\\\(\\\\pm\\\\)</span> 0.5 V with the help of HSpice.</p></div>\",\"PeriodicalId\":7827,\"journal\":{\"name\":\"Analog Integrated Circuits and Signal Processing\",\"volume\":\"119 1\",\"pages\":\"15 - 27\"},\"PeriodicalIF\":1.2000,\"publicationDate\":\"2023-12-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analog Integrated Circuits and Signal Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10470-023-02205-4\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-023-02205-4","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Low voltage high bandwidth FVF current mirror using quasi floating self-cascode output stage
Current mirrors with ideal performance are widely in demand for realizing low power applications. In this paper, an FVF current mirror is proposed to have high bandwidth, low input, and boosted output resistance. The low voltage operation is confirmed using flipped voltage follower at the input. Also at the input, a local negative feedback loop is created which reduces the input node resistance and the achieved value ranges below an ohm. The output stage consists of a regulated cascode and a super cascode topology which is driven by an inverting amplifier realized using a self-cascode structure to improve the output resistance. However, instead of using the traditional gate-driven self-cascode, the proposed design uses its quasi-floating gate MOS transistor-based structure which further improves the output resistance and bandwidth. The proposed current mirror operates with minimum error in the range of 0–1000 µA. The bandwidth of the proposed circuit ranges in gigahertz which is 3.1 GHz. The resistance at the input is found as 0.407 Ω whereas the output has boosted resistance to a Giga ohm value which is 86 GΩ. The stability and robustness analysis is done via temperature, process corners and Monte Carlo runs. The complete design is done using the MOSFET model of UMC in 0.18-micron technology at \(\pm\) 0.5 V with the help of HSpice.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.