时间合成中的有限痕量和广义反应性规范

IF 0.7 4区计算机科学 Q3 COMPUTER SCIENCE, THEORY & METHODS

Formal Methods in System Design Pub Date : 2023-03-15 DOI:10.1007/s10703-023-00413-2

Giuseppe De Giacomo, Antonio Di Stasio, Lucas M. Tabajara, Moshe Y. Vardi, Shufang Zhu

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引用次数: 0

摘要

线性时间逻辑(LTL)合成的目的是自动合成符合LTL所表达的期望属性的程序。不幸的是，它已被证明是太困难的计算来执行完整的LTL合成。LTL合成有两个成功案例，都与规范的形式有关。第一种是GR(1)方法:使用安全条件来确定游戏中环境和代理之间可能的过渡，再加上一个强大的公平概念，即广义反应性(1)或GR(1)。第二种是受人工智能规划的启发，专注于有限轨迹时间合成，以LTL $$_f$$ f(有限轨迹LTL)作为规范语言。在本文中，我们将这两方面的工作结合在一起。我们首先研究这样一个案例:我们有一个LTL $$_f$$代理目标和一个GR(1)环境规范。然后，我们将环境和代理的安全条件添加到框架中，获得高度表达但仍然可扩展的LTL合成形式。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

Finite-trace and generalized-reactivity specifications in temporal synthesis

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Finite-trace and generalized-reactivity specifications in temporal synthesis

Abstract Linear Temporal Logic ( LTL ) synthesis aims at automatically synthesizing a program that complies with desired properties expressed in LTL . Unfortunately it has been proved to be too difficult computationally to perform full LTL synthesis. There have been two success stories with LTL synthesis, both having to do with the form of the specification. The first is the GR(1) approach: use safety conditions to determine the possible transitions in a game between the environment and the agent, plus one powerful notion of fairness, Generalized Reactivity(1), or GR(1) . The second, inspired by AI planning, is focusing on finite-trace temporal synthesis, with LTL $$_f$$ f ( LTL on finite traces) as the specification language. In this paper we take these two lines of work and bring them together. We first study the case in which we have an LTL $$_f$$ f agent goal and a GR(1) environment specification. We then add to the framework safety conditions for both the environment and the agent, obtaining a highly expressive yet still scalable form of LTL synthesis.

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来源期刊

Formal Methods in System Design 工程技术-计算机：理论方法

CiteScore

2.00

自引率

12.50%

发文量

审稿时长

>12 weeks

期刊介绍： The focus of this journal is on formal methods for designing, implementing, and validating the correctness of hardware (VLSI) and software systems. The stimulus for starting a journal with this goal came from both academia and industry. In both areas, interest in the use of formal methods has increased rapidly during the past few years. The enormous cost and time required to validate new designs has led to the realization that more powerful techniques must be developed. A number of techniques and tools are currently being devised for improving the reliability, and robustness of complex hardware and software systems. While the boundary between the (sub)components of a system that are cast in hardware, firmware, or software continues to blur, the relevant design disciplines and formal methods are maturing rapidly. Consequently, an important (and useful) collection of commonly applicable formal methods are expected to emerge that will strongly influence future design environments and design methods.