{"title":"(特邀)超越最先进的垂直GaN器件的基准测试","authors":"Ulf Gisslander, Mietek Bakowski","doi":"10.1149/11202.0023ecst","DOIUrl":null,"url":null,"abstract":"In this paper theoretical benchmarking of semi-vertical and vertical gallium nitride (GaN) MOSFETs with rated voltage of 1.2 kV to 3.3 kV is performed against silicon carbide (SiC) devices. Limitations of the semi-vertical and vertical state-of-the-art GaN structures have been investigated by simulations. Specific design features and technology requirements for realization of high voltage vertical GaN MOSFETs are discussed and implemented in simulated structures. The main modifications to the structures are reduced cell pitch and introduction of electric field shielding implantation and thick oxide at the gate trench bottom and p-type implanted junction termination. The main findings are: (a) specific on-resistance of vertical GaN devices is 75% and 40% of that for 1.2 kV and 3.3 kV SiC MOSFETs, respectively, (b) semi-vertical GaN show no advantage over SiC MOSFETs for medium and high voltage devices over 1 kV, (c) vertical GaN has potential advantage for high and ultra-high voltage devices.","PeriodicalId":11473,"journal":{"name":"ECS Transactions","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"(Invited) Benchmarking of Beyond the State-of-the-Art Vertical GaN Devices\",\"authors\":\"Ulf Gisslander, Mietek Bakowski\",\"doi\":\"10.1149/11202.0023ecst\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper theoretical benchmarking of semi-vertical and vertical gallium nitride (GaN) MOSFETs with rated voltage of 1.2 kV to 3.3 kV is performed against silicon carbide (SiC) devices. Limitations of the semi-vertical and vertical state-of-the-art GaN structures have been investigated by simulations. Specific design features and technology requirements for realization of high voltage vertical GaN MOSFETs are discussed and implemented in simulated structures. The main modifications to the structures are reduced cell pitch and introduction of electric field shielding implantation and thick oxide at the gate trench bottom and p-type implanted junction termination. The main findings are: (a) specific on-resistance of vertical GaN devices is 75% and 40% of that for 1.2 kV and 3.3 kV SiC MOSFETs, respectively, (b) semi-vertical GaN show no advantage over SiC MOSFETs for medium and high voltage devices over 1 kV, (c) vertical GaN has potential advantage for high and ultra-high voltage devices.\",\"PeriodicalId\":11473,\"journal\":{\"name\":\"ECS Transactions\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-09-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ECS Transactions\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1149/11202.0023ecst\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ECS Transactions","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1149/11202.0023ecst","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
(Invited) Benchmarking of Beyond the State-of-the-Art Vertical GaN Devices
In this paper theoretical benchmarking of semi-vertical and vertical gallium nitride (GaN) MOSFETs with rated voltage of 1.2 kV to 3.3 kV is performed against silicon carbide (SiC) devices. Limitations of the semi-vertical and vertical state-of-the-art GaN structures have been investigated by simulations. Specific design features and technology requirements for realization of high voltage vertical GaN MOSFETs are discussed and implemented in simulated structures. The main modifications to the structures are reduced cell pitch and introduction of electric field shielding implantation and thick oxide at the gate trench bottom and p-type implanted junction termination. The main findings are: (a) specific on-resistance of vertical GaN devices is 75% and 40% of that for 1.2 kV and 3.3 kV SiC MOSFETs, respectively, (b) semi-vertical GaN show no advantage over SiC MOSFETs for medium and high voltage devices over 1 kV, (c) vertical GaN has potential advantage for high and ultra-high voltage devices.