Matheus Isquierdo, Renira Soares, Felipe Sampaio, Bruno Zatt, Daniel Palomino
{"title":"使用近似存储的VVC解码器内预测:一个错误恢复评估","authors":"Matheus Isquierdo, Renira Soares, Felipe Sampaio, Bruno Zatt, Daniel Palomino","doi":"10.1007/s10470-023-02189-1","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents an error resilience evaluation of the intra prediction step in Versatile Video Coding decoders when approximate storage is employed in the Reference Line Buffer (RLB). We present an error injection framework to simulate the use of approximate storage in the RLB buffer with commonly used bit error rate (BER) values from literature for static random-access memory and dynamic random-access memory technologies. We perform an error resilience evaluation based on peak signal-to-noise ratio and structural similarity for twelve video sequences, considering different decoding settings, with four quantization parameters, two encoding configurations, and seven BERs. We also present a few examples, showing how approximately decoded sequences can look and performing a subjective visual quality analysis. Our analysis characterizes how the impacts of approximation are dependent on video content and configurations. The results show that approximate storage can be used in some of the evaluated scenarios with very low degradation on the final visual quality of the decoded video sequences.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":null,"pages":null},"PeriodicalIF":1.2000,"publicationDate":"2023-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"VVC decoder intra prediction using approximate storage: an error resilience evaluation\",\"authors\":\"Matheus Isquierdo, Renira Soares, Felipe Sampaio, Bruno Zatt, Daniel Palomino\",\"doi\":\"10.1007/s10470-023-02189-1\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper presents an error resilience evaluation of the intra prediction step in Versatile Video Coding decoders when approximate storage is employed in the Reference Line Buffer (RLB). We present an error injection framework to simulate the use of approximate storage in the RLB buffer with commonly used bit error rate (BER) values from literature for static random-access memory and dynamic random-access memory technologies. We perform an error resilience evaluation based on peak signal-to-noise ratio and structural similarity for twelve video sequences, considering different decoding settings, with four quantization parameters, two encoding configurations, and seven BERs. We also present a few examples, showing how approximately decoded sequences can look and performing a subjective visual quality analysis. Our analysis characterizes how the impacts of approximation are dependent on video content and configurations. The results show that approximate storage can be used in some of the evaluated scenarios with very low degradation on the final visual quality of the decoded video sequences.</p></div>\",\"PeriodicalId\":7827,\"journal\":{\"name\":\"Analog Integrated Circuits and Signal Processing\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.2000,\"publicationDate\":\"2023-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analog Integrated Circuits and Signal Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10470-023-02189-1\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-023-02189-1","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
VVC decoder intra prediction using approximate storage: an error resilience evaluation
This paper presents an error resilience evaluation of the intra prediction step in Versatile Video Coding decoders when approximate storage is employed in the Reference Line Buffer (RLB). We present an error injection framework to simulate the use of approximate storage in the RLB buffer with commonly used bit error rate (BER) values from literature for static random-access memory and dynamic random-access memory technologies. We perform an error resilience evaluation based on peak signal-to-noise ratio and structural similarity for twelve video sequences, considering different decoding settings, with four quantization parameters, two encoding configurations, and seven BERs. We also present a few examples, showing how approximately decoded sequences can look and performing a subjective visual quality analysis. Our analysis characterizes how the impacts of approximation are dependent on video content and configurations. The results show that approximate storage can be used in some of the evaluated scenarios with very low degradation on the final visual quality of the decoded video sequences.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.