{"title":"在fpga上使用浮点运算加速科学n体仿真","authors":"G. Lienhart, A. Kugel, R. Männer","doi":"10.1109/FPGA.2002.1106673","DOIUrl":null,"url":null,"abstract":"This paper investigates the usage of floating-point arithmetic on FPGAs for N-Body simulation in natural science. The common aspect of these applications is the simple computing structure where forces between a particle and its surrounding particles are summed up. The role of reduced precision arithmetic is discussed, and our implementation of a floating-point arithmetic library with parameterized operators is presented. On the base of this library, implementation strategies of complex arithmetic units are discussed. Finally the realization of a fully pipelined pressure force calculation unit consisting of 60 floating-point operators with a resulting performance of 3.9 Gflops on an off the shelf FPGA is presented.","PeriodicalId":272235,"journal":{"name":"Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","volume":"99 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"99","resultStr":"{\"title\":\"Using floating-point arithmetic on FPGAs to accelerate scientific N-Body simulations\",\"authors\":\"G. Lienhart, A. Kugel, R. Männer\",\"doi\":\"10.1109/FPGA.2002.1106673\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates the usage of floating-point arithmetic on FPGAs for N-Body simulation in natural science. The common aspect of these applications is the simple computing structure where forces between a particle and its surrounding particles are summed up. The role of reduced precision arithmetic is discussed, and our implementation of a floating-point arithmetic library with parameterized operators is presented. On the base of this library, implementation strategies of complex arithmetic units are discussed. Finally the realization of a fully pipelined pressure force calculation unit consisting of 60 floating-point operators with a resulting performance of 3.9 Gflops on an off the shelf FPGA is presented.\",\"PeriodicalId\":272235,\"journal\":{\"name\":\"Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines\",\"volume\":\"99 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-09-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"99\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FPGA.2002.1106673\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPGA.2002.1106673","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Using floating-point arithmetic on FPGAs to accelerate scientific N-Body simulations
This paper investigates the usage of floating-point arithmetic on FPGAs for N-Body simulation in natural science. The common aspect of these applications is the simple computing structure where forces between a particle and its surrounding particles are summed up. The role of reduced precision arithmetic is discussed, and our implementation of a floating-point arithmetic library with parameterized operators is presented. On the base of this library, implementation strategies of complex arithmetic units are discussed. Finally the realization of a fully pipelined pressure force calculation unit consisting of 60 floating-point operators with a resulting performance of 3.9 Gflops on an off the shelf FPGA is presented.