4mW 1 GS/s连续时间ΔΣ调制器，带宽15.6MHz，动态范围67db

2011 Proceedings of the ESSCIRC (ESSCIRC) Pub Date : 2011-10-13 DOI:10.1109/ESSCIRC.2011.6044956

Ankesh Jain, Muthusubramanian Venkateswaran, S. Pavan

{"title":"4mW 1 GS/s连续时间ΔΣ调制器，带宽15.6MHz，动态范围67db","authors":"Ankesh Jain, Muthusubramanian Venkateswaran, S. Pavan","doi":"10.1109/ESSCIRC.2011.6044956","DOIUrl":null,"url":null,"abstract":"We present architectural and circuit design details of a single-bit continuous-time ΔΣ modulator in 0.13 μm CMOS sampling at 1 GS/s. The “assisted opamp technique” is used to obtain high linearity with low power consumption. Analysis of the effects of timing-skew between the feedback and assistant DACs is given. The converter achieves a dynamic range of 67 dB in 15.6 MHz bandwidth and consumes 4 mW. The figure of merit (FOM) of the modulator is 93 fJ/level.1","PeriodicalId":239979,"journal":{"name":"2011 Proceedings of the ESSCIRC (ESSCIRC)","volume":"398 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 4mW 1 GS/s continuous-time ΔΣ modulator with 15.6MHz bandwidth and 67 dB dynamic range\",\"authors\":\"Ankesh Jain, Muthusubramanian Venkateswaran, S. Pavan\",\"doi\":\"10.1109/ESSCIRC.2011.6044956\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present architectural and circuit design details of a single-bit continuous-time ΔΣ modulator in 0.13 μm CMOS sampling at 1 GS/s. The “assisted opamp technique” is used to obtain high linearity with low power consumption. Analysis of the effects of timing-skew between the feedback and assistant DACs is given. The converter achieves a dynamic range of 67 dB in 15.6 MHz bandwidth and consumes 4 mW. The figure of merit (FOM) of the modulator is 93 fJ/level.1\",\"PeriodicalId\":239979,\"journal\":{\"name\":\"2011 Proceedings of the ESSCIRC (ESSCIRC)\",\"volume\":\"398 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 Proceedings of the ESSCIRC (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2011.6044956\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2011.6044956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

我们提出了一个0.13 μm CMOS采样速率为1 GS/s的单比特连续时间ΔΣ调制器的结构和电路设计细节。“辅助opamp技术”用于在低功耗下获得高线性度。分析了反馈dac和辅助dac之间的时间偏差的影响。该转换器在15.6 MHz带宽下实现67 dB的动态范围，功耗为4 mW。调制器的优值(FOM)为93 fJ/电平1

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A 4mW 1 GS/s continuous-time ΔΣ modulator with 15.6MHz bandwidth and 67 dB dynamic range

We present architectural and circuit design details of a single-bit continuous-time ΔΣ modulator in 0.13 μm CMOS sampling at 1 GS/s. The “assisted opamp technique” is used to obtain high linearity with low power consumption. Analysis of the effects of timing-skew between the feedback and assistant DACs is given. The converter achieves a dynamic range of 67 dB in 15.6 MHz bandwidth and consumes 4 mW. The figure of merit (FOM) of the modulator is 93 fJ/level.1

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2011 Proceedings of the ESSCIRC (ESSCIRC)

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