在radhard 0.18-/spl mu/m FDSOI过程中传统静态和动态电路的总剂量性能

2005 IEEE International SOI Conference Proceedings Pub Date : 2005-12-27 DOI:10.1109/SOI.2005.1563582

P. Gouker, B. Tyrrell, P. Wyatt, E. Austin, A. Soares, C.K. Chen, J. Burns

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引用次数: 1

摘要

在MIT-LL 0.18-/spl mu/m FDSOI CMOS工艺下制备了静态和动态电路，对总剂量辐射耐受高达1 Mrad (SiO/sub 2/)。电路是使用传统的设计规则和布局技术设计的，也就是说，它们不是通过设计来实现的。硬化是在电路制造级使用工艺增强。这是迄今为止首次报道的这些新增强的电路级硬度结果。

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Total dose performance of conventional static and dynamic circuits in a radhard 0.18-/spl mu/m FDSOI process

Static and dynamic circuits were fabricated in the MIT-LL 0.18-/spl mu/m FDSOI CMOS process, and exhibited a high tolerance to total dose radiation up to 1 Mrad (SiO/sub 2/). Circuits were designed using conventional design rules and layout techniques, i.e., they are not radhard-by-design. Hardening was done at the circuit fabrication level using process enhancements. These are the first circuit-level hardness results reported to date for these new enhancements.

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2005 IEEE International SOI Conference Proceedings

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