混合信号集成电路的低成本测试架构

J. L. da Silva, E. Camargo, Douglas Foster, Sandro T. Coelho, A. G. de Oliveira, A. Olmos, M. Lubaszewski
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引用次数: 0

摘要

混合信号集成电路的可测试性是一个复杂的问题,因为测试电路必须满足低面积、低功耗等相互冲突的约束,同时又要缩短测试时间。本文提出了一个完整的解决方案,提高了混合信号电路的可测试性,基于3引脚接口。该解决方案包含一个高效的低成本测试架构,可以对混合信号电路进行结构和功能测试。实验结果表明,所提体系结构的灵活性适用于不同测试需求的应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low cost test architecture for mixed-signal integrated circuits
Mixed-signal integrated circuit testability is a complex problem because test circuitry must satisfy conflicting constraints, such as low area and power meanwhile achieving reduced test time. This paper presents a complete solution that enhances the state of the art towards testability of mixed-signal circuits, based on a 3-pin interface. This solution encompasses an efficient low cost test architecture that enables structural and functional tests of mixed-signal circuits. Experimental results demonstrate the proposed architecture flexibility applied to applications with diverse test requirements.
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