采用65nm部分耗尽SOI CMOS技术设计的低噪声毫米波注入锁定振荡器

Romane Dumont, M. D. Matos, A. Cathelin, Y. Deval
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引用次数: 1

摘要

提出了一种基于交叉耦合振荡器拓扑结构的低相位噪声注入锁定振荡器。原型ILO采用意法半导体(STMicroelectronics) 65纳米部分耗尽SOI (PD-SOI) CMOS技术设计和制造。27.47 GHz自由运行振荡器在10 mhz偏置时的相位噪声为-119.23 dBc/Hz,对工艺变化的鲁棒性小于4 dB。使用共模注入,当振荡器被5.5 GHz参考的5次谐波注入锁定时,拟议的ILO产生27.5 GHz的输出频率。在注入锁定模式下,在1 mhz和10 mhz偏移量下,相位噪声性能分别为- 116.75 dBc/Hz和- 135 dBc/Hz,而仅从1 V电源消耗2.06 mW。总的活动面积为0.031 mm2(不包括I/O垫)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Low-Noise mm-Wave Injection-Locked Oscillator designed in 65nm Partially Depleted SOI CMOS Technology
A low-phase-noise injection-locked oscillator (ILO) based on a cross-coupled oscillator topology is presented. The prototype ILO was designed and fabricated in a 65-nm Partially Depleted SOI (PD-SOI) CMOS technology from STMicroelectronics. The 27.47 GHz free-running oscillator exhibits a phase noise of –119.23 dBc/Hz at 10-MHz offset, and its robustness to process variations is less than 4 dB. Using a common mode injection, the proposed ILO generates an output frequency at 27.5-GHz when the oscillator is injection-locked by the 5th harmonic of a 5.5 GHz reference. In injection-locked mode, the phase noise performance is then –116.75 dBc/Hz and – 135 dBc/Hz at 1-MHz and 10-MHz offsets, respectively, while solely consuming 2.06 mW from a 1 V supply. The total active area is 0.031 mm2 (excluding I/O pads).
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