Sunil Pathania, Mallikarjun Vasa, B. Mutnury, Rohit Sharma
{"title":"高速PCB互连的热影响","authors":"Sunil Pathania, Mallikarjun Vasa, B. Mutnury, Rohit Sharma","doi":"10.1109/EPEPS47316.2019.193226","DOIUrl":null,"url":null,"abstract":"As signal speeds increase, small imperfections start to dictate the performance of interconnects. Thermal effects are an inseparable aspect of interconnects due to self-heating caused by the flow of current, and due to environmental heating in high speed designs. This paper presents in detail, thermal effects and their impact on insertion loss, crosstalk and phase of high-speed signals. The paper also describes the thermal sensitivity on various aspects of interconnect design such as inter pair spacing, trace height, and dielectric thickness. For our analysis, simulations were performed using field solvers for temperatures ranging from 20°C to 100°C. Finally, results are analyzed with percentage variation in copper loss versus dielectric losses.","PeriodicalId":304228,"journal":{"name":"2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Thermal Impact on High Speed PCB Interconnects\",\"authors\":\"Sunil Pathania, Mallikarjun Vasa, B. Mutnury, Rohit Sharma\",\"doi\":\"10.1109/EPEPS47316.2019.193226\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As signal speeds increase, small imperfections start to dictate the performance of interconnects. Thermal effects are an inseparable aspect of interconnects due to self-heating caused by the flow of current, and due to environmental heating in high speed designs. This paper presents in detail, thermal effects and their impact on insertion loss, crosstalk and phase of high-speed signals. The paper also describes the thermal sensitivity on various aspects of interconnect design such as inter pair spacing, trace height, and dielectric thickness. For our analysis, simulations were performed using field solvers for temperatures ranging from 20°C to 100°C. Finally, results are analyzed with percentage variation in copper loss versus dielectric losses.\",\"PeriodicalId\":304228,\"journal\":{\"name\":\"2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)\",\"volume\":\"126 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS47316.2019.193226\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS47316.2019.193226","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
As signal speeds increase, small imperfections start to dictate the performance of interconnects. Thermal effects are an inseparable aspect of interconnects due to self-heating caused by the flow of current, and due to environmental heating in high speed designs. This paper presents in detail, thermal effects and their impact on insertion loss, crosstalk and phase of high-speed signals. The paper also describes the thermal sensitivity on various aspects of interconnect design such as inter pair spacing, trace height, and dielectric thickness. For our analysis, simulations were performed using field solvers for temperatures ranging from 20°C to 100°C. Finally, results are analyzed with percentage variation in copper loss versus dielectric losses.