P. Hashemi, K. Balakrishnan, A. Majumdar, A. Khakifirooz, Wanki Kim, A. Baraskar, L. Yang, Kevin K. H. Chan, S. Engelmann, J. Ott, D. Antoniadis, E. Leobandung, Dae-gyu Park
{"title":"应变Si1−xGex-on-insulator PMOS finfet具有优异的亚阈值泄漏,极高的短通道性能和10nm及以上节点的源注入速度","authors":"P. Hashemi, K. Balakrishnan, A. Majumdar, A. Khakifirooz, Wanki Kim, A. Baraskar, L. Yang, Kevin K. H. Chan, S. Engelmann, J. Ott, D. Antoniadis, E. Leobandung, Dae-gyu Park","doi":"10.1109/VLSIT.2014.6894344","DOIUrl":null,"url":null,"abstract":"We demonstrate high performance (HP) s-SiGe pMOS finFETs with I<sub>on</sub>/I<sub>eff</sub> of ~1.05/0.52mA/μm and ~1.3/0.71mA/μm at I<sub>off</sub>=100nA/μm at V<sub>DD</sub>=0.8 and 1V, extremely high intrinsic performance and source injection velocity. Compared to earlier work, an optimized process flow and a novel interface passivation scheme, result in ~30% mobility enhancement and dramatic sub-threshold-swing reduction to 65mV/dec. We also demonstrate the most aggressively scaled s-SiGe finFET reported to date, with W<sub>FIN</sub>~8nm and L<sub>G</sub>~15nm, while maintaining high current drive and low leakage. With their very low GIDL-limited I<sub>D, min</sub> and more manufacturing-friendly process compared to high-Ge content SiGe devices, as well as impressive I<sub>on</sub>~0.42mA/μm at I<sub>off</sub> =100nA/μm and g<sub>m, int</sub> as high as 2.4mS/μm at V<sub>DD</sub>=0.5V, s-SiGe finFETs are strong candidates for future HP and low-power applications.","PeriodicalId":105807,"journal":{"name":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","volume":"254 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Strained Si1−xGex-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond\",\"authors\":\"P. Hashemi, K. Balakrishnan, A. Majumdar, A. Khakifirooz, Wanki Kim, A. Baraskar, L. Yang, Kevin K. H. Chan, S. Engelmann, J. Ott, D. Antoniadis, E. Leobandung, Dae-gyu Park\",\"doi\":\"10.1109/VLSIT.2014.6894344\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate high performance (HP) s-SiGe pMOS finFETs with I<sub>on</sub>/I<sub>eff</sub> of ~1.05/0.52mA/μm and ~1.3/0.71mA/μm at I<sub>off</sub>=100nA/μm at V<sub>DD</sub>=0.8 and 1V, extremely high intrinsic performance and source injection velocity. Compared to earlier work, an optimized process flow and a novel interface passivation scheme, result in ~30% mobility enhancement and dramatic sub-threshold-swing reduction to 65mV/dec. We also demonstrate the most aggressively scaled s-SiGe finFET reported to date, with W<sub>FIN</sub>~8nm and L<sub>G</sub>~15nm, while maintaining high current drive and low leakage. With their very low GIDL-limited I<sub>D, min</sub> and more manufacturing-friendly process compared to high-Ge content SiGe devices, as well as impressive I<sub>on</sub>~0.42mA/μm at I<sub>off</sub> =100nA/μm and g<sub>m, int</sub> as high as 2.4mS/μm at V<sub>DD</sub>=0.5V, s-SiGe finFETs are strong candidates for future HP and low-power applications.\",\"PeriodicalId\":105807,\"journal\":{\"name\":\"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers\",\"volume\":\"254 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2014.6894344\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2014.6894344","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Strained Si1−xGex-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond
We demonstrate high performance (HP) s-SiGe pMOS finFETs with Ion/Ieff of ~1.05/0.52mA/μm and ~1.3/0.71mA/μm at Ioff=100nA/μm at VDD=0.8 and 1V, extremely high intrinsic performance and source injection velocity. Compared to earlier work, an optimized process flow and a novel interface passivation scheme, result in ~30% mobility enhancement and dramatic sub-threshold-swing reduction to 65mV/dec. We also demonstrate the most aggressively scaled s-SiGe finFET reported to date, with WFIN~8nm and LG~15nm, while maintaining high current drive and low leakage. With their very low GIDL-limited ID, min and more manufacturing-friendly process compared to high-Ge content SiGe devices, as well as impressive Ion~0.42mA/μm at Ioff =100nA/μm and gm, int as high as 2.4mS/μm at VDD=0.5V, s-SiGe finFETs are strong candidates for future HP and low-power applications.