e波段Doherty功率放大器的设计

M. Najmussadat, Raju Ahamed, D. Parveg, M. Varonen, K. Halonen
{"title":"e波段Doherty功率放大器的设计","authors":"M. Najmussadat, Raju Ahamed, D. Parveg, M. Varonen, K. Halonen","doi":"10.1109/PRIME.2018.8430350","DOIUrl":null,"url":null,"abstract":"This paper demonstrates the design of an E-band Doherty power amplifier (PA) based in an 130nm SiGe BiCMOS process. This design includes main and auxiliary amplifiers, lange coupler and a pre-amplifier. The designed power amplifier exhibits a saturated output power of 14.4 dBm and output referred P1dB of 11.7 dBm. The peak power added efficiency (PAE) of this amplifier is 19.2%. This PA shows PAE of 17% at P1dB and 11.6% at 6-dB output power back off. The peak power gain of this Doherty PA is 23 dB at 75 GHz with a 3-dB bandwidth from 60 to 80 GHz. The designed Doherty PA consumes DC power of 52 mW with a chip area of 900 μm × 800 μm without RF pads.","PeriodicalId":384458,"journal":{"name":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Design of an E-band Doherty Power amplifier\",\"authors\":\"M. Najmussadat, Raju Ahamed, D. Parveg, M. Varonen, K. Halonen\",\"doi\":\"10.1109/PRIME.2018.8430350\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper demonstrates the design of an E-band Doherty power amplifier (PA) based in an 130nm SiGe BiCMOS process. This design includes main and auxiliary amplifiers, lange coupler and a pre-amplifier. The designed power amplifier exhibits a saturated output power of 14.4 dBm and output referred P1dB of 11.7 dBm. The peak power added efficiency (PAE) of this amplifier is 19.2%. This PA shows PAE of 17% at P1dB and 11.6% at 6-dB output power back off. The peak power gain of this Doherty PA is 23 dB at 75 GHz with a 3-dB bandwidth from 60 to 80 GHz. The designed Doherty PA consumes DC power of 52 mW with a chip area of 900 μm × 800 μm without RF pads.\",\"PeriodicalId\":384458,\"journal\":{\"name\":\"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PRIME.2018.8430350\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PRIME.2018.8430350","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

本文介绍了一种基于130纳米SiGe BiCMOS工艺的e波段Doherty功率放大器的设计。本设计包括主放大器、辅助放大器、兰格耦合器和前置放大器。设计的功率放大器饱和输出功率为14.4 dBm,参考P1dB输出为11.7 dBm。该放大器的峰值功率附加效率(PAE)为19.2%。该PA显示P1dB时PAE为17%,6db输出功率关闭时PAE为11.6%。该Doherty PA在75 GHz时的峰值功率增益为23 dB,在60至80 GHz的带宽范围内为3 dB。设计的Doherty PA功耗为52 mW,芯片面积为900 μm × 800 μm,不含射频垫。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of an E-band Doherty Power amplifier
This paper demonstrates the design of an E-band Doherty power amplifier (PA) based in an 130nm SiGe BiCMOS process. This design includes main and auxiliary amplifiers, lange coupler and a pre-amplifier. The designed power amplifier exhibits a saturated output power of 14.4 dBm and output referred P1dB of 11.7 dBm. The peak power added efficiency (PAE) of this amplifier is 19.2%. This PA shows PAE of 17% at P1dB and 11.6% at 6-dB output power back off. The peak power gain of this Doherty PA is 23 dB at 75 GHz with a 3-dB bandwidth from 60 to 80 GHz. The designed Doherty PA consumes DC power of 52 mW with a chip area of 900 μm × 800 μm without RF pads.
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