M. Najmussadat, Raju Ahamed, D. Parveg, M. Varonen, K. Halonen
{"title":"e波段Doherty功率放大器的设计","authors":"M. Najmussadat, Raju Ahamed, D. Parveg, M. Varonen, K. Halonen","doi":"10.1109/PRIME.2018.8430350","DOIUrl":null,"url":null,"abstract":"This paper demonstrates the design of an E-band Doherty power amplifier (PA) based in an 130nm SiGe BiCMOS process. This design includes main and auxiliary amplifiers, lange coupler and a pre-amplifier. The designed power amplifier exhibits a saturated output power of 14.4 dBm and output referred P1dB of 11.7 dBm. The peak power added efficiency (PAE) of this amplifier is 19.2%. This PA shows PAE of 17% at P1dB and 11.6% at 6-dB output power back off. The peak power gain of this Doherty PA is 23 dB at 75 GHz with a 3-dB bandwidth from 60 to 80 GHz. The designed Doherty PA consumes DC power of 52 mW with a chip area of 900 μm × 800 μm without RF pads.","PeriodicalId":384458,"journal":{"name":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Design of an E-band Doherty Power amplifier\",\"authors\":\"M. Najmussadat, Raju Ahamed, D. Parveg, M. Varonen, K. Halonen\",\"doi\":\"10.1109/PRIME.2018.8430350\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper demonstrates the design of an E-band Doherty power amplifier (PA) based in an 130nm SiGe BiCMOS process. This design includes main and auxiliary amplifiers, lange coupler and a pre-amplifier. The designed power amplifier exhibits a saturated output power of 14.4 dBm and output referred P1dB of 11.7 dBm. The peak power added efficiency (PAE) of this amplifier is 19.2%. This PA shows PAE of 17% at P1dB and 11.6% at 6-dB output power back off. The peak power gain of this Doherty PA is 23 dB at 75 GHz with a 3-dB bandwidth from 60 to 80 GHz. The designed Doherty PA consumes DC power of 52 mW with a chip area of 900 μm × 800 μm without RF pads.\",\"PeriodicalId\":384458,\"journal\":{\"name\":\"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PRIME.2018.8430350\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PRIME.2018.8430350","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper demonstrates the design of an E-band Doherty power amplifier (PA) based in an 130nm SiGe BiCMOS process. This design includes main and auxiliary amplifiers, lange coupler and a pre-amplifier. The designed power amplifier exhibits a saturated output power of 14.4 dBm and output referred P1dB of 11.7 dBm. The peak power added efficiency (PAE) of this amplifier is 19.2%. This PA shows PAE of 17% at P1dB and 11.6% at 6-dB output power back off. The peak power gain of this Doherty PA is 23 dB at 75 GHz with a 3-dB bandwidth from 60 to 80 GHz. The designed Doherty PA consumes DC power of 52 mW with a chip area of 900 μm × 800 μm without RF pads.