模拟CMOS特斯拉伏特倍增电路

C. dos Reis Filho, H.J. Grados
{"title":"模拟CMOS特斯拉伏特倍增电路","authors":"C. dos Reis Filho, H.J. Grados","doi":"10.1109/ICCDCS.2000.869816","DOIUrl":null,"url":null,"abstract":"This paper describes a simple CMOS analog circuit that performs the multiplication of an external bipolar voltage, e, by an applied magnetic field B. The circuit uses an arrangement of split-drain MOS transistors operating in the saturation region to produce an output difference current that is proportional to (B/spl times/e). If the external voltage e is a fraction of the mains voltage and B is produced by the corresponding current, the output signal is a measure of the instantaneous power. Measurements of a test circuit, which was built with discrete transistors fabricated in CMOS 0.8 /spl mu/m technology, have shown that a monolithic mixed-signal solution for single phase power consumption metering based on this concept is technically feasible.","PeriodicalId":301003,"journal":{"name":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","volume":"151 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Analog CMOS tesla-volt multiplier circuit\",\"authors\":\"C. dos Reis Filho, H.J. Grados\",\"doi\":\"10.1109/ICCDCS.2000.869816\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a simple CMOS analog circuit that performs the multiplication of an external bipolar voltage, e, by an applied magnetic field B. The circuit uses an arrangement of split-drain MOS transistors operating in the saturation region to produce an output difference current that is proportional to (B/spl times/e). If the external voltage e is a fraction of the mains voltage and B is produced by the corresponding current, the output signal is a measure of the instantaneous power. Measurements of a test circuit, which was built with discrete transistors fabricated in CMOS 0.8 /spl mu/m technology, have shown that a monolithic mixed-signal solution for single phase power consumption metering based on this concept is technically feasible.\",\"PeriodicalId\":301003,\"journal\":{\"name\":\"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)\",\"volume\":\"151 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCDCS.2000.869816\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCDCS.2000.869816","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

本文描述了一个简单的CMOS模拟电路,该电路将外部双极电压e与外加磁场B相乘,该电路使用在饱和区工作的分漏式MOS晶体管的排列,产生成比例的输出差分电流(B/spl乘以/e)。如果外部电压e是市电电压的一小部分,而B是由相应的电流产生的,则输出信号是瞬时功率的度量。使用CMOS 0.8 /spl mu/m技术制造的分立晶体管构建的测试电路的测量表明,基于该概念的单相功耗测量的单片混合信号解决方案在技术上是可行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analog CMOS tesla-volt multiplier circuit
This paper describes a simple CMOS analog circuit that performs the multiplication of an external bipolar voltage, e, by an applied magnetic field B. The circuit uses an arrangement of split-drain MOS transistors operating in the saturation region to produce an output difference current that is proportional to (B/spl times/e). If the external voltage e is a fraction of the mains voltage and B is produced by the corresponding current, the output signal is a measure of the instantaneous power. Measurements of a test circuit, which was built with discrete transistors fabricated in CMOS 0.8 /spl mu/m technology, have shown that a monolithic mixed-signal solution for single phase power consumption metering based on this concept is technically feasible.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信