{"title":"模拟CMOS特斯拉伏特倍增电路","authors":"C. dos Reis Filho, H.J. Grados","doi":"10.1109/ICCDCS.2000.869816","DOIUrl":null,"url":null,"abstract":"This paper describes a simple CMOS analog circuit that performs the multiplication of an external bipolar voltage, e, by an applied magnetic field B. The circuit uses an arrangement of split-drain MOS transistors operating in the saturation region to produce an output difference current that is proportional to (B/spl times/e). If the external voltage e is a fraction of the mains voltage and B is produced by the corresponding current, the output signal is a measure of the instantaneous power. Measurements of a test circuit, which was built with discrete transistors fabricated in CMOS 0.8 /spl mu/m technology, have shown that a monolithic mixed-signal solution for single phase power consumption metering based on this concept is technically feasible.","PeriodicalId":301003,"journal":{"name":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","volume":"151 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Analog CMOS tesla-volt multiplier circuit\",\"authors\":\"C. dos Reis Filho, H.J. Grados\",\"doi\":\"10.1109/ICCDCS.2000.869816\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a simple CMOS analog circuit that performs the multiplication of an external bipolar voltage, e, by an applied magnetic field B. The circuit uses an arrangement of split-drain MOS transistors operating in the saturation region to produce an output difference current that is proportional to (B/spl times/e). If the external voltage e is a fraction of the mains voltage and B is produced by the corresponding current, the output signal is a measure of the instantaneous power. Measurements of a test circuit, which was built with discrete transistors fabricated in CMOS 0.8 /spl mu/m technology, have shown that a monolithic mixed-signal solution for single phase power consumption metering based on this concept is technically feasible.\",\"PeriodicalId\":301003,\"journal\":{\"name\":\"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)\",\"volume\":\"151 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCDCS.2000.869816\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCDCS.2000.869816","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes a simple CMOS analog circuit that performs the multiplication of an external bipolar voltage, e, by an applied magnetic field B. The circuit uses an arrangement of split-drain MOS transistors operating in the saturation region to produce an output difference current that is proportional to (B/spl times/e). If the external voltage e is a fraction of the mains voltage and B is produced by the corresponding current, the output signal is a measure of the instantaneous power. Measurements of a test circuit, which was built with discrete transistors fabricated in CMOS 0.8 /spl mu/m technology, have shown that a monolithic mixed-signal solution for single phase power consumption metering based on this concept is technically feasible.