{"title":"一种采用浮栅MOS技术的0.8V运算放大器","authors":"R. Sehgal, S. S. Rajput, S. Jamuar","doi":"10.1109/SMELEC.2006.380746","DOIUrl":null,"url":null,"abstract":"A two-stage low voltage operational amplifier for operation at plusmn0.4 V is proposed. The amplifier incorporates a low voltage current mirror designed using standard floating gate MOSFETs. The proposed op amp possesses a 49 dB open-loop gain, a high bandwidth of 698 kHz, 42deg phase margin and consumes only 28.6 muW. The operation of the proposed current mirror and op amp has been confirmed by PSPICE simulations, using 0.13 mum CMOS technology.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A 0.8V Operational Amplifier using Floating Gate MOS Technology\",\"authors\":\"R. Sehgal, S. S. Rajput, S. Jamuar\",\"doi\":\"10.1109/SMELEC.2006.380746\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A two-stage low voltage operational amplifier for operation at plusmn0.4 V is proposed. The amplifier incorporates a low voltage current mirror designed using standard floating gate MOSFETs. The proposed op amp possesses a 49 dB open-loop gain, a high bandwidth of 698 kHz, 42deg phase margin and consumes only 28.6 muW. The operation of the proposed current mirror and op amp has been confirmed by PSPICE simulations, using 0.13 mum CMOS technology.\",\"PeriodicalId\":136703,\"journal\":{\"name\":\"2006 IEEE International Conference on Semiconductor Electronics\",\"volume\":\"112 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Conference on Semiconductor Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2006.380746\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Conference on Semiconductor Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2006.380746","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
摘要
提出了一种工作电压为+ 0.4 V的两级低电压运算放大器。放大器集成了一个使用标准浮栅mosfet设计的低压电流反射镜。所提出的运放具有49 dB开环增益，698 kHz高带宽，42度相位裕度，功耗仅为28.6 muW。采用0.13 μ m CMOS技术的PSPICE仿真证实了所提出的电流镜和运放的运行。
A 0.8V Operational Amplifier using Floating Gate MOS Technology
A two-stage low voltage operational amplifier for operation at plusmn0.4 V is proposed. The amplifier incorporates a low voltage current mirror designed using standard floating gate MOSFETs. The proposed op amp possesses a 49 dB open-loop gain, a high bandwidth of 698 kHz, 42deg phase margin and consumes only 28.6 muW. The operation of the proposed current mirror and op amp has been confirmed by PSPICE simulations, using 0.13 mum CMOS technology.
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