Souha Hacine, Tarik El Khach, F. Mailly, L. Latorre, P. Nouet
{"title":"微功率高分辨率ΣΔ CMOS温度传感器","authors":"Souha Hacine, Tarik El Khach, F. Mailly, L. Latorre, P. Nouet","doi":"10.1109/ICSENS.2011.6127123","DOIUrl":null,"url":null,"abstract":"This paper introduces a simple and compact CMOS temperature sensor which sensing principle relies on the measurement of integrated polysilicon resistances. The architecture makes use of two resistive layers of opposite temperature coefficients, both being available in the CMOS process. In order to tackle power consumption issues, usually related to resistive transduction and Wheatstone bridge conditioners, resistors are here placed in an original stage featuring gain even at very low-biasing current (2µA in this case). This analog front-end is used into a 1st order ΣΔ modulator, providing a digital output (i.e. a bitstream) with little additional silicon surface. The paper describes the design of the circuit and provides both simulation and experimental results. Experimental data are obtained from silicon prototypes, over a - 40°C to 100°C temperature range. High resolution (below 0.1°C) is observed.","PeriodicalId":201386,"journal":{"name":"2011 IEEE SENSORS Proceedings","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A micro-power high-resolution ΣΔ CMOS temperature sensor\",\"authors\":\"Souha Hacine, Tarik El Khach, F. Mailly, L. Latorre, P. Nouet\",\"doi\":\"10.1109/ICSENS.2011.6127123\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a simple and compact CMOS temperature sensor which sensing principle relies on the measurement of integrated polysilicon resistances. The architecture makes use of two resistive layers of opposite temperature coefficients, both being available in the CMOS process. In order to tackle power consumption issues, usually related to resistive transduction and Wheatstone bridge conditioners, resistors are here placed in an original stage featuring gain even at very low-biasing current (2µA in this case). This analog front-end is used into a 1st order ΣΔ modulator, providing a digital output (i.e. a bitstream) with little additional silicon surface. The paper describes the design of the circuit and provides both simulation and experimental results. Experimental data are obtained from silicon prototypes, over a - 40°C to 100°C temperature range. High resolution (below 0.1°C) is observed.\",\"PeriodicalId\":201386,\"journal\":{\"name\":\"2011 IEEE SENSORS Proceedings\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE SENSORS Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSENS.2011.6127123\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE SENSORS Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSENS.2011.6127123","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A micro-power high-resolution ΣΔ CMOS temperature sensor
This paper introduces a simple and compact CMOS temperature sensor which sensing principle relies on the measurement of integrated polysilicon resistances. The architecture makes use of two resistive layers of opposite temperature coefficients, both being available in the CMOS process. In order to tackle power consumption issues, usually related to resistive transduction and Wheatstone bridge conditioners, resistors are here placed in an original stage featuring gain even at very low-biasing current (2µA in this case). This analog front-end is used into a 1st order ΣΔ modulator, providing a digital output (i.e. a bitstream) with little additional silicon surface. The paper describes the design of the circuit and provides both simulation and experimental results. Experimental data are obtained from silicon prototypes, over a - 40°C to 100°C temperature range. High resolution (below 0.1°C) is observed.