IC设计中的ESD保护器件问题

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169) Pub Date : 2001-05-09 DOI:10.1109/CICC.2001.929720

C. Duvvury

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引用次数: 18

摘要

静电放电(ESD)一直是影响集成电路芯片质量的主要问题。本文综述了由静电放电引起的集成电路损伤现象及其防护技术。此外，先进工艺技术对ESD稳健性的严重影响，以及使保护设计更具挑战性的特殊电路要求也将得到解决。讨论了最近发展的仿真和建模方法，以改进保护设计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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ESD protection device issues for IC designs

Electrostatic discharge (ESD) has been a major concern for IC chip quality. In this paper, the IC damage phenomena due to ESD and the protection techniques are reviewed. Also, the severe impact of the advanced process technologies on the ESD robustness, and the special circuit requirements that make the protection design even more challenging will be addressed. The recently developed simulation and modeling methods to improve the protection designs are also discussed.

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Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)

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