{"title":"基于破坏性故障隔离的有效后端缺陷定位","authors":"Siew Ming Lim, Jack Yi Jie Ng","doi":"10.1109/IPFA55383.2022.9915770","DOIUrl":null,"url":null,"abstract":"Nanoprobing has become increasingly important for die level failure analysis as the industry moves towards smaller geometry over the years. This paper presents two case studies on Field Programmable Grid Array (FPGA) failure to demonstrate a destructive fault isolation methodology with the combination of delayering and nanoprobing in physical failure analysis","PeriodicalId":378702,"journal":{"name":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Effective Backend Defect Localization by Destructive Fault Isolation\",\"authors\":\"Siew Ming Lim, Jack Yi Jie Ng\",\"doi\":\"10.1109/IPFA55383.2022.9915770\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Nanoprobing has become increasingly important for die level failure analysis as the industry moves towards smaller geometry over the years. This paper presents two case studies on Field Programmable Grid Array (FPGA) failure to demonstrate a destructive fault isolation methodology with the combination of delayering and nanoprobing in physical failure analysis\",\"PeriodicalId\":378702,\"journal\":{\"name\":\"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA55383.2022.9915770\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA55383.2022.9915770","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Effective Backend Defect Localization by Destructive Fault Isolation
Nanoprobing has become increasingly important for die level failure analysis as the industry moves towards smaller geometry over the years. This paper presents two case studies on Field Programmable Grid Array (FPGA) failure to demonstrate a destructive fault isolation methodology with the combination of delayering and nanoprobing in physical failure analysis