{"title":"时序电路的路径延迟故障仿真算法","authors":"T. Chakraborty, V. Agrawal, M. Bushnell","doi":"10.1109/ATS.1992.224444","DOIUrl":null,"url":null,"abstract":"The authors present a differential algorithm for concurrent simulation of path delay faults in sequential circuits. The simulator determines all three conditions, namely, initialization, signal transition propagation through the path, and fault effect observation at a primary output, by analyzing vector-pairs and the hazard states occurring between vectors.<<ETX>>","PeriodicalId":208029,"journal":{"name":"Proceedings First Asian Test Symposium (ATS `92)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Path delay fault simulation algorithms for sequential circuits\",\"authors\":\"T. Chakraborty, V. Agrawal, M. Bushnell\",\"doi\":\"10.1109/ATS.1992.224444\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors present a differential algorithm for concurrent simulation of path delay faults in sequential circuits. The simulator determines all three conditions, namely, initialization, signal transition propagation through the path, and fault effect observation at a primary output, by analyzing vector-pairs and the hazard states occurring between vectors.<<ETX>>\",\"PeriodicalId\":208029,\"journal\":{\"name\":\"Proceedings First Asian Test Symposium (ATS `92)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings First Asian Test Symposium (ATS `92)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1992.224444\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings First Asian Test Symposium (ATS `92)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1992.224444","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Path delay fault simulation algorithms for sequential circuits
The authors present a differential algorithm for concurrent simulation of path delay faults in sequential circuits. The simulator determines all three conditions, namely, initialization, signal transition propagation through the path, and fault effect observation at a primary output, by analyzing vector-pairs and the hazard states occurring between vectors.<>
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