4- 40gb /s PAM-4发射机，采用65nm CMOS混合驱动技术

2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI:10.1109/MWSCAS.2019.8885140

Dengjie Wang, Hong Chen, Wenhuan Luan, Xin Lin, Fangxu Lv, Ziqiang Wang, Hanjun Jiang, Chun Zhang, Zhihua Wang

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引用次数: 0

摘要

本文介绍了一种采用新型混合驱动的4- 40gb /s PAM-4发射机。与传统的电流模式(CM)驱动器线性度差和源串联端接(SST)驱动器差分输出摆幅有限不同，本文提出的混合驱动采用CM和SST驱动器的组合结构，在高线性度下提供超过电源电压的差分输出摆幅。此外，采用混合驱动，采用65nm CMOS技术设计了4- 40gb /s四分之一速率的一抽头前馈均衡发射机，在1.2 V电源电压下产生1.8V差分峰对峰输出摆幅，电平失配率为96.4%。

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A 4-40 Gb/s PAM-4 transmitter with a hybrid driver in 65 nm CMOS technology

This paper presents a 4-40 Gb/s PAM-4 transmitter using a novel hybrid driver. Different from conventional current-mode (CM) drivers with poor linearity and source-series terminated (SST) drivers with limited differential output swing, the proposed hybrid driver delivers a differential output swing exceeding the supply voltage with high linearity using a combination structure of the CM and SST driver. In addition, a 4-40 Gb/s quarter-rate transmitter with one-tap feedforward equalization is designed in 65nm CMOS technology using the hybrid driver, yielding a 1.8V differential peak-to-peak output swing at 1.2 V supply voltage with a 96.4% ratio of level mismatch.

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2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)

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