采用2nH片上电感的高效率DC-DC变换器

J. Wibben, R. Harjani
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引用次数: 37

摘要

历史上,降压变换器依赖于1到100 μ h的高q电感来实现高效率。在本文中,我们利用所提出的堆叠交错拓扑中的片上磁耦合,使高效率降压变换器可以用2 nH中q的片上电感实现。采用130纳米CMOS技术实现的原型电路的转换效率是低输出电压线性转换器的两倍多,在0.9 V输出时达到77.9%的峰值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A High Efficiency DC-DC Converter Using 2nH On-Chip Inductors
Historically buck converters have relied on high-Q inductors on the order of 1 to 100 muH to achieve high efficiency. In this paper we exploit on-chip magnetic coupling in the proposed stacked interleaved topology to enable high efficiency buck converters to be realized with 2 nH moderate-Q on-chip inductors. The measured conversion efficiency for a prototype circuit implemented in a 130-nm CMOS technology was over double that of a linear converter for low output voltages rising to a peak value of 77.9% for a 0.9 V output.
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