{"title":"宽范围全数字多相时钟发生器","authors":"Hyunsoo Chae, Sangdon Jung, Chulwoo Kim","doi":"10.1109/ESSCIRC.2007.4430276","DOIUrl":null,"url":null,"abstract":"A wide-range, input-duty-independent, all-digital, multiphase clock generator is proposed. By using a supply noise filtering block power supply noise effect is reduced. Furthermore, because the proposed clock generator consists of all-digital logic gates, it can be easily migrated to a different process within a short time. The circuit has been fabricated with a 0.18 mum 1P4M CMOS technology and operates over a frequency range from 300 MHz to 1.5 GHz within 5 cycles of reference clock.","PeriodicalId":121828,"journal":{"name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A wide-range duty-independent all-digital multiphase clock generator\",\"authors\":\"Hyunsoo Chae, Sangdon Jung, Chulwoo Kim\",\"doi\":\"10.1109/ESSCIRC.2007.4430276\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A wide-range, input-duty-independent, all-digital, multiphase clock generator is proposed. By using a supply noise filtering block power supply noise effect is reduced. Furthermore, because the proposed clock generator consists of all-digital logic gates, it can be easily migrated to a different process within a short time. The circuit has been fabricated with a 0.18 mum 1P4M CMOS technology and operates over a frequency range from 300 MHz to 1.5 GHz within 5 cycles of reference clock.\",\"PeriodicalId\":121828,\"journal\":{\"name\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"volume\":\"47 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2007.4430276\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2007.4430276","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
摘要
提出了一种宽量程、输入无关、全数字、多相时钟发生器。采用电源噪声滤波模块，降低了电源噪声的影响。此外，由于所提出的时钟发生器由全数字逻辑门组成，因此可以在短时间内轻松迁移到不同的进程中。该电路采用0.18 μ m 1P4M CMOS技术制造，在参考时钟的5个周期内，在300 MHz至1.5 GHz的频率范围内工作。
A wide-range duty-independent all-digital multiphase clock generator
A wide-range, input-duty-independent, all-digital, multiphase clock generator is proposed. By using a supply noise filtering block power supply noise effect is reduced. Furthermore, because the proposed clock generator consists of all-digital logic gates, it can be easily migrated to a different process within a short time. The circuit has been fabricated with a 0.18 mum 1P4M CMOS technology and operates over a frequency range from 300 MHz to 1.5 GHz within 5 cycles of reference clock.
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